[PATCH v2 0/2] doc: simplify PMD steps

[PATCH v2 0/2] doc: simplify PMD steps

[Nicolas Chautru]

v2: Split the doc update into 2 as suggested by Thomas.
Documentation update suggested by Thomas to point towards the common kernel modules steps.

Nicolas Chautru (2):
  doc: make the Linux drivers doc more generic
  doc: simplify the binding steps

 doc/guides/bbdevs/acc100.rst           |  90 +++-----------
 doc/guides/bbdevs/acc200.rst           |  92 +++------------
 doc/guides/bbdevs/fpga_5gnr_fec.rst    | 157 +++----------------------
 doc/guides/bbdevs/fpga_lte_fec.rst     | 157 +++----------------------
 doc/guides/linux_gsg/linux_drivers.rst |   6 +-
 5 files changed, 65 insertions(+), 437 deletions(-)

-- 
2.37.1

[PATCH v2 1/2] doc: make the Linux drivers doc more generic

[Nicolas Chautru]

Minor change so that for the documentation to be less NIC centric,
as these steps can apply more generally to PCIe devices.

Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
---
 doc/guides/linux_gsg/linux_drivers.rst | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/doc/guides/linux_gsg/linux_drivers.rst b/doc/guides/linux_gsg/linux_drivers.rst
index 2f3f079aab..4f6524ef67 100644
--- a/doc/guides/linux_gsg/linux_drivers.rst
+++ b/doc/guides/linux_gsg/linux_drivers.rst
@@ -12,12 +12,12 @@ Linux Drivers
 
 Different PMDs may require different kernel drivers in order to work properly.
 Depending on the PMD being used, a corresponding kernel driver should be loaded,
-and network ports should be bound to that driver.
+and network ports or other hardware devices should be bound to that driver.
 
 .. _linux_gsg_binding_kernel:
 
-Binding and Unbinding Network Ports to/from the Kernel Modules
---------------------------------------------------------------
+Binding and Unbinding to/from the Kernel Modules
+------------------------------------------------
 
 .. note::
 
-- 
2.37.1

Re: [PATCH v2 1/2] doc: make the Linux drivers doc more generic

[Thomas Monjalon]

15/11/2022 20:59, Nicolas Chautru:
> Minor change so that for the documentation to be less NIC centric,
> as these steps can apply more generally to PCIe devices.
> 
> Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
[...]
>  Different PMDs may require different kernel drivers in order to work properly.
>  Depending on the PMD being used, a corresponding kernel driver should be loaded,
> -and network ports should be bound to that driver.
> +and network ports or other hardware devices should be bound to that driver.

We could completely remove "network ports".
There are more places in this doc which should be made more generic.

I keep this patch open to remind to work on it.
Anybody is welcome to improve this patch.

RE: [PATCH v2 1/2] doc: make the Linux drivers doc more generic

[Chautru, Nicolas]

Hi Thomas, 

Any update with regards to that series? Unsure how much more you want it to become generic. Ie. replacing most of "network port" by "PCIe device"

Thanks
Nic

> -----Original Message-----
> From: Thomas Monjalon <thomas@monjalon.net>
> Sent: Tuesday, November 22, 2022 6:59 AM
> To: Chautru, Nicolas <nicolas.chautru@intel.com>
> Cc: dev@dpdk.org; gakhil@marvell.com; maxime.coquelin@redhat.com;
> Vargas, Hernan <hernan.vargas@intel.com>
> Subject: Re: [PATCH v2 1/2] doc: make the Linux drivers doc more generic
> 
> 15/11/2022 20:59, Nicolas Chautru:
> > Minor change so that for the documentation to be less NIC centric, as
> > these steps can apply more generally to PCIe devices.
> >
> > Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
> [...]
> >  Different PMDs may require different kernel drivers in order to work
> properly.
> >  Depending on the PMD being used, a corresponding kernel driver should
> > be loaded, -and network ports should be bound to that driver.
> > +and network ports or other hardware devices should be bound to that driver.
> 
> We could completely remove "network ports".
> There are more places in this doc which should be made more generic.
> 
> I keep this patch open to remind to work on it.
> Anybody is welcome to improve this patch.
> 
> 

Re: [PATCH v2 1/2] doc: make the Linux drivers doc more generic

[Thomas Monjalon]

06/03/2023 18:41, Chautru, Nicolas:
> Hi Thomas, 
> 
> Any update with regards to that series? Unsure how much more you want it to become generic. Ie. replacing most of "network port" by "PCIe device"

Devices are not always PCI based.
The doc should reviewed entirely to make sure it is not restricted
to network ports or PCI devices.


> From: Thomas Monjalon <thomas@monjalon.net>
> > 15/11/2022 20:59, Nicolas Chautru:
> > > Minor change so that for the documentation to be less NIC centric, as
> > > these steps can apply more generally to PCIe devices.
> > >
> > > Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
> > [...]
> > >  Different PMDs may require different kernel drivers in order to work
> > properly.
> > >  Depending on the PMD being used, a corresponding kernel driver should
> > > be loaded, -and network ports should be bound to that driver.
> > > +and network ports or other hardware devices should be bound to that driver.
> > 
> > We could completely remove "network ports".
> > There are more places in this doc which should be made more generic.
> > 
> > I keep this patch open to remind to work on it.
> > Anybody is welcome to improve this patch.

RE: [PATCH v2 1/2] doc: make the Linux drivers doc more generic

[Chautru, Nicolas]

> From: Thomas Monjalon <thomas@monjalon.net>
> 06/03/2023 18:41, Chautru, Nicolas:
> > Hi Thomas,
> >
> > Any update with regards to that series? Unsure how much more you want it
> to become generic. Ie. replacing most of "network port" by "PCIe device"
> 
> Devices are not always PCI based.
> The doc should reviewed entirely to make sure it is not restricted to network
> ports or PCI devices.

OK not familiar myself with all these other variants, I did not realize you wanted to extend the scope that much. 
Have you got an ETA for such a doc update?

> > From: Thomas Monjalon <thomas@monjalon.net>
> > > 15/11/2022 20:59, Nicolas Chautru:
> > > > Minor change so that for the documentation to be less NIC centric,
> > > > as these steps can apply more generally to PCIe devices.
> > > >
> > > > Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
> > > [...]
> > > >  Different PMDs may require different kernel drivers in order to
> > > > work
> > > properly.
> > > >  Depending on the PMD being used, a corresponding kernel driver
> > > > should be loaded, -and network ports should be bound to that driver.
> > > > +and network ports or other hardware devices should be bound to that
> driver.
> > >
> > > We could completely remove "network ports".
> > > There are more places in this doc which should be made more generic.
> > >
> > > I keep this patch open to remind to work on it.
> > > Anybody is welcome to improve this patch.
> 
> 

Re: [PATCH v2 1/2] doc: make the Linux drivers doc more generic

[Thomas Monjalon]

09/03/2023 18:35, Chautru, Nicolas:
> 
> > From: Thomas Monjalon <thomas@monjalon.net>
> > 06/03/2023 18:41, Chautru, Nicolas:
> > > Hi Thomas,
> > >
> > > Any update with regards to that series? Unsure how much more you want it
> > to become generic. Ie. replacing most of "network port" by "PCIe device"
> > 
> > Devices are not always PCI based.
> > The doc should reviewed entirely to make sure it is not restricted to network
> > ports or PCI devices.
> 
> OK not familiar myself with all these other variants, I did not realize you wanted to extend the scope that much. 
> Have you got an ETA for such a doc update?

No ETA, that's why I asked who could help here.


> > > From: Thomas Monjalon <thomas@monjalon.net>
> > > > 15/11/2022 20:59, Nicolas Chautru:
> > > > > Minor change so that for the documentation to be less NIC centric,
> > > > > as these steps can apply more generally to PCIe devices.
> > > > >
> > > > > Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
> > > > [...]
> > > > >  Different PMDs may require different kernel drivers in order to
> > > > > work
> > > > properly.
> > > > >  Depending on the PMD being used, a corresponding kernel driver
> > > > > should be loaded, -and network ports should be bound to that driver.
> > > > > +and network ports or other hardware devices should be bound to that
> > driver.
> > > >
> > > > We could completely remove "network ports".
> > > > There are more places in this doc which should be made more generic.
> > > >
> > > > I keep this patch open to remind to work on it.
> > > > Anybody is welcome to improve this patch.

[PATCH v2 2/2] doc: simplify the binding steps

[Nicolas Chautru]

The steps for binding to kernel modules which are
generic are now only implicit and pointing towards
common documentation.

Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
---
 doc/guides/bbdevs/acc100.rst        |  90 +++-------------
 doc/guides/bbdevs/acc200.rst        |  92 +++-------------
 doc/guides/bbdevs/fpga_5gnr_fec.rst | 157 +++-------------------------
 doc/guides/bbdevs/fpga_lte_fec.rst  | 157 +++-------------------------
 4 files changed, 62 insertions(+), 434 deletions(-)

diff --git a/doc/guides/bbdevs/acc100.rst b/doc/guides/bbdevs/acc100.rst
index 8a275dcdd4..9aefc5cc63 100644
--- a/doc/guides/bbdevs/acc100.rst
+++ b/doc/guides/bbdevs/acc100.rst
@@ -101,90 +101,29 @@ commands for ACC100 and ACC101 respectively:
   sudo lspci -vd8086:0d5c
   sudo lspci -vd8086:57c4
 
-The physical and virtual functions are compatible with Linux UIO drivers:
-``vfio`` and ``igb_uio``. However, in order to work the 5G/4G
-FEC device first needs to be bound to one of these linux drivers through DPDK.
 
+Binding and Virtual Functions enablement
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
-Bind PF UIO driver(s)
-~~~~~~~~~~~~~~~~~~~~~
+The PMD relies on kernel modules to interface with the device: both UIO and VFIO kernel modules
+are supported.
+See :ref:`linux_gsg_binding_kernel` section for more details, notably with regards to
+generic kernel modules binding and VF enablement.
+More details on usage model is captured in the :ref:`pf_bb_config_acc100` section.
 
-Install the DPDK igb_uio driver, bind it with the PF PCI device ID and use
-``lspci`` to confirm the PF device is under use by ``igb_uio`` DPDK UIO driver.
+Device configuration
+~~~~~~~~~~~~~~~~~~~~
 
-The igb_uio driver may be bound to the PF PCI device using one of two methods for ACC100
-(for ACC101 the device id ``57c4`` should be used in lieu of ``0d5c``):
-
-
-1. PCI functions (physical or virtual, depending on the use case) can be bound to
-the UIO driver by repeating this command for every function.
-
-.. code-block:: console
-
-  cd <dpdk-top-level-directory>
-  insmod ./build/kmod/igb_uio.ko
-  echo "8086 0d5c" > /sys/bus/pci/drivers/igb_uio/new_id
-  lspci -vd8086:0d5c
-
-
-2. Another way to bind PF with DPDK UIO driver is by using the ``dpdk-devbind.py`` tool
-
-.. code-block:: console
-
-  cd <dpdk-top-level-directory>
-  ./usertools/dpdk-devbind.py -b igb_uio 0000:06:00.0
-
-where the PCI device ID (example: 0000:06:00.0) is obtained using lspci -vd8086:0d5c
-
-
-In a similar way the 5G/4G FEC PF may be bound with vfio-pci as any PCIe device.
-
-
-Enable Virtual Functions
-~~~~~~~~~~~~~~~~~~~~~~~~
-
-Now, it should be visible in the printouts that PCI PF is under igb_uio control
-"``Kernel driver in use: igb_uio``"
-
-To show the number of available VFs on the device, read ``sriov_totalvfs`` file..
-
-.. code-block:: console
-
-  cat /sys/bus/pci/devices/0000\:<b>\:<d>.<f>/sriov_totalvfs
-
-  where 0000\:<b>\:<d>.<f> is the PCI device ID
-
-
-To enable VFs via igb_uio, echo the number of virtual functions intended to
-enable to ``max_vfs`` file..
-
-.. code-block:: console
-
-  echo <num-of-vfs> > /sys/bus/pci/devices/0000\:<b>\:<d>.<f>/max_vfs
-
-
-Afterwards, all VFs must be bound to appropriate UIO drivers as required, same
-way it was done with the physical function previously.
-
-Enabling SR-IOV via vfio driver is pretty much the same, except that the file
-name is different:
-
-.. code-block:: console
-
-  echo <num-of-vfs> > /sys/bus/pci/devices/0000\:<b>\:<d>.<f>/sriov_numvfs
-
-
-Configure the VFs through PF
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-
-The PCI virtual functions must be configured before working or getting assigned
-to VMs/Containers. The configuration involves allocating the number of hardware
+The device must be configured to work properly.
+The configuration involves allocating the number of hardware
 queues, priorities, load balance, bandwidth and other settings necessary for the
 device to perform FEC functions.
 
 This configuration needs to be executed at least once after reboot or PCI FLR and can
-be achieved by using the functions ``rte_acc10x_configure()``,
+be achieved by either using ``pf_bb_config`` or the function ``rte_acc10x_configure()``,
 which sets up the parameters defined in the compatible ``acc100_conf`` structure.
+This is the method used in the bbdev-test test application.
+
 
 Test Application
 ----------------
@@ -231,6 +170,7 @@ a range of additional tests under the test_vectors folder, which may be useful.
 of these tests will depend on the device 5G/4G FEC capabilities which may cause some
 testcases to be skipped, but no failure should be reported.
 
+.. _pf_bb_config_acc100:
 
 Alternate Baseband Device configuration tool
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
diff --git a/doc/guides/bbdevs/acc200.rst b/doc/guides/bbdevs/acc200.rst
index 012b3870a8..d1cc96f894 100644
--- a/doc/guides/bbdevs/acc200.rst
+++ b/doc/guides/bbdevs/acc200.rst
@@ -110,87 +110,28 @@ can be listed through these commands for ACC200:
 
    sudo lspci -vd8086:57c0
 
-The physical and virtual functions are compatible with Linux UIO drivers:
-``vfio`` and ``igb_uio``.
-However, in order to work the 5G/4G FEC device first needs to be bound
-to one of these Linux drivers through DPDK.
 
+Binding and Virtual Functions enablement
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
-Bind PF UIO driver(s)
-~~~~~~~~~~~~~~~~~~~~~
+The PMD relies on kernel modules to interface with the device: both UIO and VFIO kernel modules
+are supported.
+See :ref:`linux_gsg_binding_kernel` section for more details, notably with regards to
+generic kernel modules binding and VF enablement.
+More details on usage model is captured in the :ref:`pf_bb_config_acc200` section.
 
-Install the DPDK igb_uio driver, bind it with the PF PCI device ID and use
-``lspci`` to confirm the PF device is under use by ``igb_uio`` DPDK UIO driver.
+Device configuration
+~~~~~~~~~~~~~~~~~~~~
 
-The igb_uio driver may be bound to the PF PCI device using one of two methods
-for ACC200:
+The device must be configured to work properly.
+The configuration involves allocating the number of hardware
+queues, priorities, load balance, bandwidth and other settings necessary for the
+device to perform FEC functions.
 
-#. PCI functions (physical or virtual, depending on the use case) can be bound
-to the UIO driver by repeating this command for every function.
-
-.. code-block:: console
-
-   cd <dpdk-top-level-directory>
-   insmod build/kmod/igb_uio.ko
-   echo "8086 57c0" > /sys/bus/pci/drivers/igb_uio/new_id
-   lspci -vd8086:57c0
-
-#. Another way to bind PF with DPDK UIO driver is by using the ``dpdk-devbind.py`` tool
-
-.. code-block:: console
-
-   cd <dpdk-top-level-directory>
-   usertools/dpdk-devbind.py -b igb_uio 0000:f7:00.0
-
-where the PCI device ID (example: 0000:f7:00.0) is obtained using ``lspci -vd8086:57c0``.
-
-In a similar way the PF may be bound with vfio-pci as any PCIe device.
-
-
-Enable Virtual Functions
-~~~~~~~~~~~~~~~~~~~~~~~~
-
-Now, it should be visible in the printouts that PCI PF is under igb_uio control
-"``Kernel driver in use: igb_uio``"
-
-To show the number of available VFs on the device, read ``sriov_totalvfs`` file.
-
-.. code-block:: console
-
-   cat /sys/bus/pci/devices/0000\:<b>\:<d>.<f>/sriov_totalvfs
-
-where ``0000\:<b>\:<d>.<f>`` is the PCI device ID
-
-To enable VFs via igb_uio, echo the number of virtual functions intended
-to enable to ``max_vfs`` file.
-
-.. code-block:: console
-
-   echo <num-of-vfs> > /sys/bus/pci/devices/0000\:<b>\:<d>.<f>/max_vfs
-
-Afterwards, all VFs must be bound to appropriate UIO drivers as required,
-same way it was done with the physical function previously.
-
-Enabling SR-IOV via VFIO driver is pretty much the same,
-except that the file name is different:
-
-.. code-block:: console
-
-   echo <num-of-vfs> > /sys/bus/pci/devices/0000\:<b>\:<d>.<f>/sriov_numvfs
-
-
-Configure the VFs through PF
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-
-The PCI virtual functions must be configured before working or getting assigned
-to VMs/Containers.
-The configuration involves allocating the number of hardware queues, priorities,
-load balance, bandwidth and other settings necessary for the device
-to perform FEC functions.
-
-This configuration needs to be executed at least once after reboot or PCI FLR
-and can be achieved by using the functions ``rte_acc200_configure()``,
+This configuration needs to be executed at least once after reboot or PCI FLR and can
+be achieved by either using ``pf_bb_config ``or the function ``rte_acc200_configure()``,
 which sets up the parameters defined in the compatible ``acc200_conf`` structure.
+This is the method used in the bbdev-test test application.
 
 
 Test Application
@@ -240,6 +181,7 @@ which may be useful.
 The results of these tests will depend on the device capabilities which may
 cause some test cases to be skipped, but no failure should be reported.
 
+.. _pf_bb_config_acc200:
 
 Alternate Baseband Device configuration tool
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
diff --git a/doc/guides/bbdevs/fpga_5gnr_fec.rst b/doc/guides/bbdevs/fpga_5gnr_fec.rst
index 9d71585e9e..2524d7cdcd 100644
--- a/doc/guides/bbdevs/fpga_5gnr_fec.rst
+++ b/doc/guides/bbdevs/fpga_5gnr_fec.rst
@@ -71,156 +71,28 @@ When the device first powers up, its PCI Physical Functions (PF) can be listed t
 
   sudo lspci -vd8086:0d8f
 
-The physical and virtual functions are compatible with Linux UIO drivers:
-``vfio`` and ``igb_uio``. However, in order to work the FPGA 5GNR FEC device firstly needs
-to be bound to one of these linux drivers through DPDK.
 
+Binding and Virtual Functions enablement
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
-Bind PF UIO driver(s)
-~~~~~~~~~~~~~~~~~~~~~
+The PMD relies on kernel modules to interface with the device: both UIO and VFIO kernel modules
+are supported.
+See :ref:`linux_gsg_binding_kernel` section for more details, notably with regards to
+generic kernel modules binding and VF enablement.
+More details on usage model is captured in the :ref:`pf_bb_config_fpga_5gnr` section.
 
-Install the DPDK igb_uio driver, bind it with the PF PCI device ID and use
-``lspci`` to confirm the PF device is under use by ``igb_uio`` DPDK UIO driver.
+Device configuration
+~~~~~~~~~~~~~~~~~~~~
 
-The igb_uio driver may be bound to the PF PCI device using one of two methods:
-
-
-1. PCI functions (physical or virtual, depending on the use case) can be bound to
-the UIO driver by repeating this command for every function.
-
-.. code-block:: console
-
-  insmod igb_uio.ko
-  echo "8086 0d8f" > /sys/bus/pci/drivers/igb_uio/new_id
-  lspci -vd8086:0d8f
-
-
-2. Another way to bind PF with DPDK UIO driver is by using the ``dpdk-devbind.py`` tool
-
-.. code-block:: console
-
-  cd <dpdk-top-level-directory>
-  ./usertools/dpdk-devbind.py -b igb_uio 0000:06:00.0
-
-where the PCI device ID (example: 0000:06:00.0) is obtained using lspci -vd8086:0d8f
-
-
-In the same way the FPGA 5GNR FEC PF can be bound with vfio, but vfio driver does not
-support SR-IOV configuration right out of the box, so it will need to be patched.
-
-
-Enable Virtual Functions
-~~~~~~~~~~~~~~~~~~~~~~~~
-
-Now, it should be visible in the printouts that PCI PF is under igb_uio control
-"``Kernel driver in use: igb_uio``"
-
-To show the number of available VFs on the device, read ``sriov_totalvfs`` file..
-
-.. code-block:: console
-
-  cat /sys/bus/pci/devices/0000\:<b>\:<d>.<f>/sriov_totalvfs
-
-  where 0000\:<b>\:<d>.<f> is the PCI device ID
-
-
-To enable VFs via igb_uio, echo the number of virtual functions intended to
-enable to ``max_vfs`` file..
-
-.. code-block:: console
-
-  echo <num-of-vfs> > /sys/bus/pci/devices/0000\:<b>\:<d>.<f>/max_vfs
-
-
-Afterwards, all VFs must be bound to appropriate UIO drivers as required, same
-way it was done with the physical function previously.
-
-Enabling SR-IOV via vfio driver is pretty much the same, except that the file
-name is different:
-
-.. code-block:: console
-
-  echo <num-of-vfs> > /sys/bus/pci/devices/0000\:<b>\:<d>.<f>/sriov_numvfs
-
-
-Configure the VFs through PF
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-
-The PCI virtual functions must be configured before working or getting assigned
-to VMs/Containers. The configuration involves allocating the number of hardware
+The device must be configured to work properly.
+The configuration involves allocating the number of hardware
 queues, priorities, load balance, bandwidth and other settings necessary for the
 device to perform FEC functions.
 
 This configuration needs to be executed at least once after reboot or PCI FLR and can
-be achieved by using the function ``rte_fpga_5gnr_fec_configure()``, which sets up the
-parameters defined in ``rte_fpga_5gnr_fec_conf`` structure:
-
-.. code-block:: c
-
-  struct rte_fpga_5gnr_fec_conf {
-      bool pf_mode_en;
-      uint8_t vf_ul_queues_number[FPGA_5GNR_FEC_NUM_VFS];
-      uint8_t vf_dl_queues_number[FPGA_5GNR_FEC_NUM_VFS];
-      uint8_t ul_bandwidth;
-      uint8_t dl_bandwidth;
-      uint8_t ul_load_balance;
-      uint8_t dl_load_balance;
-      uint16_t flr_time_out;
-  };
-
-- ``pf_mode_en``: identifies whether only PF is to be used, or the VFs. PF and
-  VFs are mutually exclusive and cannot run simultaneously.
-  Set to 1 for PF mode enabled.
-  If PF mode is enabled all queues available in the device are assigned
-  exclusively to PF and 0 queues given to VFs.
-
-- ``vf_*l_queues_number``: defines the hardware queue mapping for every VF.
-
-- ``*l_bandwidth``: in case of congestion on PCIe interface. The device
-  allocates different bandwidth to UL and DL. The weight is configured by this
-  setting. The unit of weight is 3 code blocks. For example, if the code block
-  cbps (code block per second) ratio between UL and DL is 12:1, then the
-  configuration value should be set to 36:3. The schedule algorithm is based
-  on code block regardless the length of each block.
-
-- ``*l_load_balance``: hardware queues are load-balanced in a round-robin
-  fashion. Queues get filled first-in first-out until they reach a pre-defined
-  watermark level, if exceeded, they won't get assigned new code blocks..
-  This watermark is defined by this setting.
-
-  If all hardware queues exceeds the watermark, no code blocks will be
-  streamed in from UL/DL code block FIFO.
-
-- ``flr_time_out``: specifies how many 16.384us to be FLR time out. The
-  time_out = flr_time_out x 16.384us. For instance, if you want to set 10ms for
-  the FLR time out then set this setting to 0x262=610.
-
-
-An example configuration code calling the function ``rte_fpga_5gnr_fec_configure()`` is shown
-below:
-
-.. code-block:: c
-
-  struct rte_fpga_5gnr_fec_conf conf;
-  unsigned int i;
-
-  memset(&conf, 0, sizeof(struct rte_fpga_5gnr_fec_conf));
-  conf.pf_mode_en = 1;
-
-  for (i = 0; i < FPGA_5GNR_FEC_NUM_VFS; ++i) {
-      conf.vf_ul_queues_number[i] = 4;
-      conf.vf_dl_queues_number[i] = 4;
-  }
-  conf.ul_bandwidth = 12;
-  conf.dl_bandwidth = 5;
-  conf.dl_load_balance = 64;
-  conf.ul_load_balance = 64;
-
-  /* setup FPGA PF */
-  ret = rte_fpga_5gnr_fec_configure(info->dev_name, &conf);
-  TEST_ASSERT_SUCCESS(ret,
-      "Failed to configure 4G FPGA PF for bbdev %s",
-      info->dev_name);
+be achieved by either using ``pf_bb_config`` or the function ``rte_fpga_5gnr_fec_configure()``,
+which sets up the parameters defined in the compatible ``rte_fpga_5gnr_fec_conf`` structure.
+This is the method used in the bbdev-test test application.
 
 
 Test Application
@@ -273,6 +145,7 @@ In addition to the simple LDPC decoder and LDPC encoder tests, bbdev also provid
 a range of additional tests under the test_vectors folder, which may be useful. The results
 of these tests will depend on the FPGA 5GNR FEC capabilities.
 
+.. _pf_bb_config_fpga_5gnr:
 
 Alternate Baseband Device configuration tool
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
diff --git a/doc/guides/bbdevs/fpga_lte_fec.rst b/doc/guides/bbdevs/fpga_lte_fec.rst
index c3379c24e3..505b429f3a 100644
--- a/doc/guides/bbdevs/fpga_lte_fec.rst
+++ b/doc/guides/bbdevs/fpga_lte_fec.rst
@@ -70,156 +70,28 @@ When the device first powers up, its PCI Physical Functions (PF) can be listed t
 
   sudo lspci -vd1172:5052
 
-The physical and virtual functions are compatible with Linux UIO drivers:
-``vfio`` and ``igb_uio``. However, in order to work the FPGA LTE FEC device firstly needs
-to be bound to one of these linux drivers through DPDK.
 
+Binding and Virtual Functions enablement
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
-Bind PF UIO driver(s)
-~~~~~~~~~~~~~~~~~~~~~
+The PMD relies on kernel modules to interface with the device: both UIO and VFIO kernel modules
+are supported.
+See :ref:`linux_gsg_binding_kernel` section for more details, notably with regards to
+generic kernel modules binding and VF enablement.
+More details on usage model is captured in the :ref:`pf_bb_config_fpga_lte` section.
 
-Install the DPDK igb_uio driver, bind it with the PF PCI device ID and use
-``lspci`` to confirm the PF device is under use by ``igb_uio`` DPDK UIO driver.
+Device configuration
+~~~~~~~~~~~~~~~~~~~~
 
-The igb_uio driver may be bound to the PF PCI device using one of two methods:
-
-
-1. PCI functions (physical or virtual, depending on the use case) can be bound to
-the UIO driver by repeating this command for every function.
-
-.. code-block:: console
-
-  insmod igb_uio.ko
-  echo "1172 5052" > /sys/bus/pci/drivers/igb_uio/new_id
-  lspci -vd1172:
-
-
-2. Another way to bind PF with DPDK UIO driver is by using the ``dpdk-devbind.py`` tool
-
-.. code-block:: console
-
-  cd <dpdk-top-level-directory>
-  ./usertools/dpdk-devbind.py -b igb_uio 0000:06:00.0
-
-where the PCI device ID (example: 0000:06:00.0) is obtained using lspci -vd1172:
-
-
-In the same way the FPGA LTE FEC PF can be bound with vfio, but vfio driver does not
-support SR-IOV configuration right out of the box, so it will need to be patched.
-
-
-Enable Virtual Functions
-~~~~~~~~~~~~~~~~~~~~~~~~
-
-Now, it should be visible in the printouts that PCI PF is under igb_uio control
-"``Kernel driver in use: igb_uio``"
-
-To show the number of available VFs on the device, read ``sriov_totalvfs`` file..
-
-.. code-block:: console
-
-  cat /sys/bus/pci/devices/0000\:<b>\:<d>.<f>/sriov_totalvfs
-
-  where 0000\:<b>\:<d>.<f> is the PCI device ID
-
-
-To enable VFs via igb_uio, echo the number of virtual functions intended to
-enable to ``max_vfs`` file..
-
-.. code-block:: console
-
-  echo <num-of-vfs> > /sys/bus/pci/devices/0000\:<b>\:<d>.<f>/max_vfs
-
-
-Afterwards, all VFs must be bound to appropriate UIO drivers as required, same
-way it was done with the physical function previously.
-
-Enabling SR-IOV via vfio driver is pretty much the same, except that the file
-name is different:
-
-.. code-block:: console
-
-  echo <num-of-vfs> > /sys/bus/pci/devices/0000\:<b>\:<d>.<f>/sriov_numvfs
-
-
-Configure the VFs through PF
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-
-The PCI virtual functions must be configured before working or getting assigned
-to VMs/Containers. The configuration involves allocating the number of hardware
+The device must be configured to work properly.
+The configuration involves allocating the number of hardware
 queues, priorities, load balance, bandwidth and other settings necessary for the
 device to perform FEC functions.
 
 This configuration needs to be executed at least once after reboot or PCI FLR and can
-be achieved by using the function ``rte_fpga_lte_fec_configure()``, which sets up the
-parameters defined in ``rte_fpga_lte_fec_conf`` structure:
-
-.. code-block:: c
-
-  struct rte_fpga_lte_fec_conf {
-      bool pf_mode_en;
-      uint8_t vf_ul_queues_number[FPGA_LTE_FEC_NUM_VFS];
-      uint8_t vf_dl_queues_number[FPGA_LTE_FEC_NUM_VFS];
-      uint8_t ul_bandwidth;
-      uint8_t dl_bandwidth;
-      uint8_t ul_load_balance;
-      uint8_t dl_load_balance;
-      uint16_t flr_time_out;
-  };
-
-- ``pf_mode_en``: identifies whether only PF is to be used, or the VFs. PF and
-  VFs are mutually exclusive and cannot run simultaneously.
-  Set to 1 for PF mode enabled.
-  If PF mode is enabled all queues available in the device are assigned
-  exclusively to PF and 0 queues given to VFs.
-
-- ``vf_*l_queues_number``: defines the hardware queue mapping for every VF.
-
-- ``*l_bandwidth``: in case of congestion on PCIe interface. The device
-  allocates different bandwidth to UL and DL. The weight is configured by this
-  setting. The unit of weight is 3 code blocks. For example, if the code block
-  cbps (code block per second) ratio between UL and DL is 12:1, then the
-  configuration value should be set to 36:3. The schedule algorithm is based
-  on code block regardless the length of each block.
-
-- ``*l_load_balance``: hardware queues are load-balanced in a round-robin
-  fashion. Queues get filled first-in first-out until they reach a pre-defined
-  watermark level, if exceeded, they won't get assigned new code blocks..
-  This watermark is defined by this setting.
-
-  If all hardware queues exceeds the watermark, no code blocks will be
-  streamed in from UL/DL code block FIFO.
-
-- ``flr_time_out``: specifies how many 16.384us to be FLR time out. The
-  time_out = flr_time_out x 16.384us. For instance, if you want to set 10ms for
-  the FLR time out then set this setting to 0x262=610.
-
-
-An example configuration code calling the function ``rte_fpga_lte_fec_configure()`` is shown
-below:
-
-.. code-block:: c
-
-  struct rte_fpga_lte_fec_conf conf;
-  unsigned int i;
-
-  memset(&conf, 0, sizeof(struct rte_fpga_lte_fec_conf));
-  conf.pf_mode_en = 1;
-
-  for (i = 0; i < FPGA_LTE_FEC_NUM_VFS; ++i) {
-      conf.vf_ul_queues_number[i] = 4;
-      conf.vf_dl_queues_number[i] = 4;
-  }
-  conf.ul_bandwidth = 12;
-  conf.dl_bandwidth = 5;
-  conf.dl_load_balance = 64;
-  conf.ul_load_balance = 64;
-
-  /* setup FPGA PF */
-  ret = rte_fpga_lte_fec_configure(info->dev_name, &conf);
-  TEST_ASSERT_SUCCESS(ret,
-      "Failed to configure 4G FPGA PF for bbdev %s",
-      info->dev_name);
+be achieved by either using ``pf_bb_config`` or the function ``rte_fpga_lte_fec_configure()``,
+which sets up the parameters defined in the compatible ``rte_fpga_lte_fec_conf`` structure.
+This is the method used in the bbdev-test test application.
 
 
 Test Application
@@ -292,6 +164,7 @@ of these tests will depend on the FPGA LTE FEC capabilities:
    - ``turbo_enc_c3_k4800_r2_e14412_crc24b.data``
    - ``turbo_enc_c4_k4800_r2_e14412_crc24b.data``
 
+.. _pf_bb_config_fpga_lte:
 
 Alternate Baseband Device configuration tool
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-- 
2.37.1

Re: [PATCH v2 2/2] doc: simplify the binding steps

[Thomas Monjalon]

15/11/2022 20:59, Nicolas Chautru:
> -The PCI virtual functions must be configured before working or getting assigned
> -to VMs/Containers. The configuration involves allocating the number of hardware
> +The device must be configured to work properly.
> +The configuration involves allocating the number of hardware
>  queues, priorities, load balance, bandwidth and other settings necessary for the
>  device to perform FEC functions.
>  
>  This configuration needs to be executed at least once after reboot or PCI FLR and can
> -be achieved by using the functions ``rte_acc10x_configure()``,
> +be achieved by either using ``pf_bb_config`` or the function ``rte_acc10x_configure()``,
>  which sets up the parameters defined in the compatible ``acc100_conf`` structure.
> +This is the method used in the bbdev-test test application.

Clearly this patch is more than "simplifying binding steps".

RE: [PATCH v2 2/2] doc: simplify the binding steps

[Chautru, Nicolas]

Hi Thomas, 

> -----Original Message-----
> From: Thomas Monjalon <thomas@monjalon.net>
> Sent: Tuesday, November 22, 2022 7:01 AM
> To: Chautru, Nicolas <nicolas.chautru@intel.com>
> Cc: dev@dpdk.org; gakhil@marvell.com; maxime.coquelin@redhat.com;
> Vargas, Hernan <hernan.vargas@intel.com>
> Subject: Re: [PATCH v2 2/2] doc: simplify the binding steps
> 
> 15/11/2022 20:59, Nicolas Chautru:
> > -The PCI virtual functions must be configured before working or
> > getting assigned -to VMs/Containers. The configuration involves
> > allocating the number of hardware
> > +The device must be configured to work properly.
> > +The configuration involves allocating the number of hardware
> >  queues, priorities, load balance, bandwidth and other settings
> > necessary for the  device to perform FEC functions.
> >
> >  This configuration needs to be executed at least once after reboot or
> > PCI FLR and can -be achieved by using the functions
> > ``rte_acc10x_configure()``,
> > +be achieved by either using ``pf_bb_config`` or the function
> > +``rte_acc10x_configure()``,
> >  which sets up the parameters defined in the compatible ``acc100_conf``
> structure.
> > +This is the method used in the bbdev-test test application.
> 
> Clearly this patch is more than "simplifying binding steps".
> 

The intent has indeed to remove much of the binding steps to point to generic document, then minor updates to keep the flow readable and informative. 
Let me know what you are referring to specifically which caught your eyes. 
Some of the FPGA configuration steps were also simplifies to align with the other PMDs. 
We can rename if you prefer as doc: simplify the binding and configuration steps. Or split but unsure of the value. Up to you. 
Thanks
Nic

Re: [PATCH v2 2/2] doc: simplify the binding steps

[Thomas Monjalon]

22/11/2022 22:21, Chautru, Nicolas:
> From: Thomas Monjalon <thomas@monjalon.net>
> > 15/11/2022 20:59, Nicolas Chautru:
> > > -The PCI virtual functions must be configured before working or
> > > getting assigned -to VMs/Containers. The configuration involves
> > > allocating the number of hardware
> > > +The device must be configured to work properly.
> > > +The configuration involves allocating the number of hardware
> > >  queues, priorities, load balance, bandwidth and other settings
> > > necessary for the  device to perform FEC functions.
> > >
> > >  This configuration needs to be executed at least once after reboot or
> > > PCI FLR and can -be achieved by using the functions
> > > ``rte_acc10x_configure()``,
> > > +be achieved by either using ``pf_bb_config`` or the function
> > > +``rte_acc10x_configure()``,
> > >  which sets up the parameters defined in the compatible ``acc100_conf``
> > structure.
> > > +This is the method used in the bbdev-test test application.
> > 
> > Clearly this patch is more than "simplifying binding steps".
> > 
> 
> The intent has indeed to remove much of the binding steps to point to generic document, then minor updates to keep the flow readable and informative. 
> Let me know what you are referring to specifically which caught your eyes. 
> Some of the FPGA configuration steps were also simplifies to align with the other PMDs. 
> We can rename if you prefer as doc: simplify the binding and configuration steps. Or split but unsure of the value. Up to you. 

You are adding more information.
One example is above.
I think it deserves a separate commit to understand which info you add and why.

RE: [PATCH v2 2/2] doc: simplify the binding steps

[Chautru, Nicolas]

Hi Thomas, 

> -----Original Message-----
> From: Thomas Monjalon <thomas@monjalon.net>
> Sent: Wednesday, November 23, 2022 12:35 AM
> To: Chautru, Nicolas <nicolas.chautru@intel.com>
> Cc: dev@dpdk.org; gakhil@marvell.com; maxime.coquelin@redhat.com;
> Vargas, Hernan <hernan.vargas@intel.com>
> Subject: Re: [PATCH v2 2/2] doc: simplify the binding steps
> 
> 22/11/2022 22:21, Chautru, Nicolas:
> > From: Thomas Monjalon <thomas@monjalon.net>
> > > 15/11/2022 20:59, Nicolas Chautru:
> > > > -The PCI virtual functions must be configured before working or
> > > > getting assigned -to VMs/Containers. The configuration involves
> > > > allocating the number of hardware
> > > > +The device must be configured to work properly.
> > > > +The configuration involves allocating the number of hardware
> > > >  queues, priorities, load balance, bandwidth and other settings
> > > > necessary for the  device to perform FEC functions.
> > > >
> > > >  This configuration needs to be executed at least once after
> > > > reboot or PCI FLR and can -be achieved by using the functions
> > > > ``rte_acc10x_configure()``,
> > > > +be achieved by either using ``pf_bb_config`` or the function
> > > > +``rte_acc10x_configure()``,
> > > >  which sets up the parameters defined in the compatible
> > > > ``acc100_conf``
> > > structure.
> > > > +This is the method used in the bbdev-test test application.
> > >
> > > Clearly this patch is more than "simplifying binding steps".
> > >
> >
> > The intent has indeed to remove much of the binding steps to point to
> generic document, then minor updates to keep the flow readable and
> informative.
> > Let me know what you are referring to specifically which caught your eyes.
> > Some of the FPGA configuration steps were also simplifies to align with the
> other PMDs.
> > We can rename if you prefer as doc: simplify the binding and configuration
> steps. Or split but unsure of the value. Up to you.
> 
> You are adding more information.
> One example is above.
> I think it deserves a separate commit to understand which info you add and
> why.
> 

To avoid iterations, you just want to split this commit again into two: 
- doc: simplify the binding steps
- doc: simplify and clarify the configuration steps

Thanks for confirming. 
Nic

Re: [PATCH v2 2/2] doc: simplify the binding steps

[Thomas Monjalon]

24/11/2022 02:09, Chautru, Nicolas:
> Hi Thomas, 
> 
> > -----Original Message-----
> > From: Thomas Monjalon <thomas@monjalon.net>
> > Sent: Wednesday, November 23, 2022 12:35 AM
> > To: Chautru, Nicolas <nicolas.chautru@intel.com>
> > Cc: dev@dpdk.org; gakhil@marvell.com; maxime.coquelin@redhat.com;
> > Vargas, Hernan <hernan.vargas@intel.com>
> > Subject: Re: [PATCH v2 2/2] doc: simplify the binding steps
> > 
> > 22/11/2022 22:21, Chautru, Nicolas:
> > > From: Thomas Monjalon <thomas@monjalon.net>
> > > > 15/11/2022 20:59, Nicolas Chautru:
> > > > > -The PCI virtual functions must be configured before working or
> > > > > getting assigned -to VMs/Containers. The configuration involves
> > > > > allocating the number of hardware
> > > > > +The device must be configured to work properly.
> > > > > +The configuration involves allocating the number of hardware
> > > > >  queues, priorities, load balance, bandwidth and other settings
> > > > > necessary for the  device to perform FEC functions.
> > > > >
> > > > >  This configuration needs to be executed at least once after
> > > > > reboot or PCI FLR and can -be achieved by using the functions
> > > > > ``rte_acc10x_configure()``,
> > > > > +be achieved by either using ``pf_bb_config`` or the function
> > > > > +``rte_acc10x_configure()``,
> > > > >  which sets up the parameters defined in the compatible
> > > > > ``acc100_conf``
> > > > structure.
> > > > > +This is the method used in the bbdev-test test application.
> > > >
> > > > Clearly this patch is more than "simplifying binding steps".
> > > >
> > >
> > > The intent has indeed to remove much of the binding steps to point to
> > generic document, then minor updates to keep the flow readable and
> > informative.
> > > Let me know what you are referring to specifically which caught your eyes.
> > > Some of the FPGA configuration steps were also simplifies to align with the
> > other PMDs.
> > > We can rename if you prefer as doc: simplify the binding and configuration
> > steps. Or split but unsure of the value. Up to you.
> > 
> > You are adding more information.
> > One example is above.
> > I think it deserves a separate commit to understand which info you add and
> > why.
> > 
> 
> To avoid iterations, you just want to split this commit again into two: 
> - doc: simplify the binding steps
> - doc: simplify and clarify the configuration steps
> 
> Thanks for confirming. 
> Nic

Yes