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From: Andrew Rybchenko <arybchenko@solarflare.com>
To: Haiyue Wang <haiyue.wang@intel.com>, <dev@dpdk.org>
Cc: Ferruh Yigit <ferruh.yigit@intel.com>,
	Thomas Monjalon <thomas@monjalon.net>
Subject: Re: [dpdk-dev] [RFC] ethdev: reserve the RX offload most-significant bits for PMD scartch
Date: Thu, 20 Jun 2019 21:30:10 +0300	[thread overview]
Message-ID: <41d93d60-9097-48a4-6a26-8ebd0cfb4b39@solarflare.com> (raw)
In-Reply-To: <1561015552-37671-1-git-send-email-haiyue.wang@intel.com>

CC ethdev maintainers

On 6/20/19 10:25 AM, Haiyue Wang wrote:
> Generally speaking, the DEV_RX_OFFLOAD_xxx for RX offload capabilities
> of a device is one-bit field definition, it has 64 different values at
> most.
>
> Nowdays the receiving queue of NIC has rich features not just checksum
> offload, like it can extract the network protocol header fields to its
> RX descriptors for quickly handling. But this kind of feature is not so
> common, and it is hardware related. Normally, this can be done through
> rte_devargs driver parameters, but the scope is per device. This is not
> so nice for per queue design.
>
> The per queue API 'rte_eth_rx_queue_setup' and data structure 'struct
> rte_eth_rxconf' are stable now, and be common for all PMDs. For keeping
> the ethdev API & ABI compatibility, and the application can make good
> use of the NIC's specific features, reserving the most-significant bits
> of RX offload seems an compromise method.
>
> Then the PMDs redefine these bits as they want, all PMDs share the same
> bit positions and expose their new definitions with the header file.
>
> The experimental reserved bits number is 6 currently. Tt can be one-bit
> for each features up to the the maximum number 6. It can also be some
> bits encoding: e.g, 6 bits can stand for 63 maximum number of features.
>
> We call these reserved bits as DEV_RX_OFFLOAD_PMD_SCRATCH. And the left
> unused bits number is : 64 - 19 (currently defined) - 6 (PMD scartch) =
> 39.
>
> This is not so nice for applications, they need to check PMD's driver
> name for lookuping their DEV_RX_OFFLOAD_PMD_SCRATCH definitions. But it
> is good for the applications to make use of the hardware compatibility.
>
> Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>

I would say that it very bad for applications. It sounds like reserved bits
in registers which have meaning in fact and sometimes different meaning.
Of course, it is not that bad when rules are defined, but such kind of
features tend to spread and clutter up interfaces. IMHO, the feature is
really frightening.


  reply	other threads:[~2019-06-20 18:30 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-20  7:25 Haiyue Wang
2019-06-20 18:30 ` Andrew Rybchenko [this message]
2019-06-21  1:12   ` Wang, Haiyue
2019-06-21  7:33     ` Andrew Rybchenko
2019-06-21  7:37       ` Wang, Haiyue
2019-06-21  7:39         ` Andrew Rybchenko
2019-06-21  7:43           ` Wang, Haiyue
2019-06-21 15:14             ` Stephen Hemminger
2019-06-21 16:37               ` Wang, Haiyue
2019-06-21 16:45                 ` David Marchand
2019-06-21 16:57                   ` Wang, Haiyue
2019-06-20 18:35 ` Stephen Hemminger
2019-06-21  0:55   ` Wang, Haiyue

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