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Thu, 6 Oct 2016 07:57:28 +0800 From: "Chen, Jing D" To: "Shaw, Jeffrey B" , "dev@dpdk.org" CC: "Zhang, Helin" , "Wu, Jingjing" , "damarion@cisco.com" , "Zhang, Qi Z" Thread-Topic: [PATCH v2 2/2] i40e: Enable bad checksum flags in i40e vPMD Thread-Index: AQHSH0UMEZMbkYw2/kCNwmEqetf1mqCah+0Q Date: Wed, 5 Oct 2016 23:57:28 +0000 Message-ID: <4341B239C0EFF9468EE453F9E9F4604D3A387BDA@shsmsx102.ccr.corp.intel.com> References: <1468515542-39207-2-git-send-email-jeffrey.b.shaw@intel.com> <1475712772-105327-1-git-send-email-jeffrey.b.shaw@intel.com> <1475712772-105327-2-git-send-email-jeffrey.b.shaw@intel.com> In-Reply-To: <1475712772-105327-2-git-send-email-jeffrey.b.shaw@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYmI0YmVjMzAtZTQyYy00YWUwLWIwMWYtNmQwMjU3MmZiNjdkIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6InY2V3l0MXdDZko2RWpWcVwvdmc1bnc4MGNSVGpcL083aGRzTktTSExRVHBlbz0ifQ== x-ctpclassification: CTP_IC x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2 2/2] i40e: Enable bad checksum flags in i40e vPMD X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 05 Oct 2016 23:57:33 -0000 Hi, > -----Original Message----- > From: Shaw, Jeffrey B > Sent: Wednesday, October 5, 2016 5:13 PM > To: dev@dpdk.org > Cc: Zhang, Helin ; Wu, Jingjing > ; damarion@cisco.com; Zhang, Qi Z > ; Chen, Jing D > Subject: [PATCH v2 2/2] i40e: Enable bad checksum flags in i40e vPMD >=20 > From: Damjan Marion >=20 > Decode the checksum flags from the rx descriptor, setting the appropriate= bit > in the mbuf ol_flags field when the flag indicates a bad checksum. >=20 > Signed-off-by: Damjan Marion > Signed-off-by: Jeff Shaw > --- > drivers/net/i40e/i40e_rxtx_vec.c | 48 +++++++++++++++++++++++-----------= ---- > -- > 1 file changed, 28 insertions(+), 20 deletions(-) >=20 > diff --git a/drivers/net/i40e/i40e_rxtx_vec.c > b/drivers/net/i40e/i40e_rxtx_vec.c > index 6c63141..d2267ad 100644 > --- a/drivers/net/i40e/i40e_rxtx_vec.c > +++ b/drivers/net/i40e/i40e_rxtx_vec.c > @@ -138,19 +138,14 @@ i40e_rxq_rearm(struct i40e_rx_queue *rxq) static > inline void desc_to_olflags_v(__m128i descs[4], struct rte_mbuf **rx_pkt= s) { > - __m128i vlan0, vlan1, rss; > - union { > - uint16_t e[4]; > - uint64_t dword; > - } vol; > + __m128i vlan0, vlan1, rss, l3_l4e; >=20 > /* mask everything except RSS, flow director and VLAN flags > * bit2 is for VLAN tag, bit11 for flow director indication > * bit13:12 for RSS indication. > */ > - const __m128i rss_vlan_msk =3D _mm_set_epi16( > - 0x0000, 0x0000, 0x0000, 0x0000, > - 0x3804, 0x3804, 0x3804, 0x3804); > + const __m128i rss_vlan_msk =3D _mm_set_epi32( > + 0x1c03004, 0x1c03004, 0x1c03004, 0x1c03004); >=20 > /* map rss and vlan type to rss hash and vlan flag */ > const __m128i vlan_flags =3D _mm_set_epi8(0, 0, 0, 0, @@ -163,23 > +158,36 @@ desc_to_olflags_v(__m128i descs[4], struct rte_mbuf **rx_pkts) > PKT_RX_RSS_HASH | PKT_RX_FDIR, > PKT_RX_RSS_HASH, 0, 0, > 0, 0, PKT_RX_FDIR, 0); >=20 > - vlan0 =3D _mm_unpackhi_epi16(descs[0], descs[1]); > - vlan1 =3D _mm_unpackhi_epi16(descs[2], descs[3]); > - vlan0 =3D _mm_unpacklo_epi32(vlan0, vlan1); > + const __m128i l3_l4e_flags =3D _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0, > + PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD > | PKT_RX_IP_CKSUM_BAD, > + PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD, > + PKT_RX_EIP_CKSUM_BAD | PKT_RX_IP_CKSUM_BAD, > + PKT_RX_EIP_CKSUM_BAD, > + PKT_RX_L4_CKSUM_BAD | PKT_RX_IP_CKSUM_BAD, > + PKT_RX_L4_CKSUM_BAD, > + PKT_RX_IP_CKSUM_BAD, > + 0); > + > + vlan0 =3D _mm_unpackhi_epi32(descs[0], descs[1]); > + vlan1 =3D _mm_unpackhi_epi32(descs[2], descs[3]); > + vlan0 =3D _mm_unpacklo_epi64(vlan0, vlan1); >=20 > vlan1 =3D _mm_and_si128(vlan0, rss_vlan_msk); > vlan0 =3D _mm_shuffle_epi8(vlan_flags, vlan1); >=20 > - rss =3D _mm_srli_epi16(vlan1, 11); > + rss =3D _mm_srli_epi32(vlan1, 12); > rss =3D _mm_shuffle_epi8(rss_flags, rss); My bad. Original code will use bit[13:11] to identify RSS and FDIR flag. No= w=20 It masked bit 11 out when creating " rss_vlan_msk" and doing shift above, while it still try to use original "rss_flags"?