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Wed, 24 Jul 2024 10:59:24 +0000 Received: from DM8PR11MB5653.namprd11.prod.outlook.com ([fe80::2962:1efd:f912:a5a3]) by DM8PR11MB5653.namprd11.prod.outlook.com ([fe80::2962:1efd:f912:a5a3%5]) with mapi id 15.20.7784.020; Wed, 24 Jul 2024 10:59:24 +0000 Message-ID: <4494141c-268a-4b41-8582-37ca96ddaf0a@intel.com> Date: Wed, 24 Jul 2024 11:59:15 +0100 User-Agent: Mozilla Thunderbird Subject: Re: [EXTERNAL] [PATCH v2] examples/ipsec-secgw: fix SA salt endianness problem Content-Language: en-US To: Akhil Goyal , "Medvedkin, Vladimir" , Chaoyong He , "dev@dpdk.org" , Anoob Joseph , "Nithin Kumar Dabilpuram" , Gagandeep Singh , Kai Ji , Brian Dooley , Jack Bond-Preston , "pablo.de.lara.guarch@intel.com" , "hemant.agrawal@nxp.com" , "suanmingm@nvidia.com" CC: "oss-drivers@corigine.com" , Shihong Wang , "stable@dpdk.org" References: <20240311024939.2523778-2-chaoyong.he@corigine.com> <20240314020052.3107549-1-chaoyong.he@corigine.com> <7c690dcb-8824-452e-85d5-7f665ff56246@intel.com> From: Radu Nicolau In-Reply-To: Content-Type: text/plain; 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In my opinion salt should not be affected by endianness and it should be used as it is in the key parameter. I think the patch is wrong to make it CPU endianness dependent before being passed to the PMDs, any PMD that needs the endianness swapped should do it in the PMD code. Indeed it's passed around as a 32 bit integer but it's not used as such, and when it's actually used it should be evaluated as a byte array. https://datatracker.ietf.org/doc/html/rfc4106#section-4 https://datatracker.ietf.org/doc/html/rfc4106#section-8.1 > > >> >> >> On 03/07/2024 18:58, Akhil Goyal wrote: >> >> >> >> >> >> -----Original Message----- >> From: Akhil Goyal >> >> Sent: Friday, March 15, 2024 12:42 AM >> To: Akhil Goyal >> ; Chaoyong He >> >> ; dev@dpdk.org >> Cc: oss-drivers@corigine.com > drivers@corigine.com> ; Shihong Wang >> ; >> stable@dpdk.org >> Subject: RE: [EXTERNAL] [PATCH v2] examples/ipsec-secgw: fix >> SA salt >> endianness problem >> >> >> Subject: RE: [EXTERNAL] [PATCH v2] examples/ipsec- >> secgw: fix SA salt >> endianness problem >> >> >> From: Shihong Wang >> >> >> The SA salt of struct ipsec_sa is a CPU-endian >> u32 variable, but it’s >> value is stored in an array of encryption or >> authentication keys >> according to big-endian. So it maybe need to >> convert the endianness >> order to ensure that the value assigned to the >> SA salt is CPU-endian. >> >> Fixes: 50d75cae2a2c ("examples/ipsec-secgw: >> initialize SA salt") >> Fixes: 9413c3901f31 ("examples/ipsec-secgw: >> support additional algorithms") >> Fixes: 501e9c226adf ("examples/ipsec-secgw: >> add AEAD parameters") >> Cc: stable@dpdk.org >> >> Signed-off-by: Shihong Wang >> >> Reviewed-by: Chaoyong He >> >> >> >> Acked-by: Akhil Goyal >> >> >> Applied to dpdk-next-crypto >> >> >> The patch is pulled back from dpdk-next-crypto. >> This change may cause all the PMDs to fail these cases. >> Would need acks from PMDs. >> >> >> Applied to dpdk-next-crypto >> No update from PMD owners. >> Applying it before RC2 so that we have time for fixes if needed. >> >> >> -- >> Regards, >> Vladimir