From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id BC391A0471 for ; Mon, 9 Sep 2019 12:21:15 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8E1AA1EBE2; Mon, 9 Sep 2019 12:21:15 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id 078C61EBDB for ; Mon, 9 Sep 2019 12:21:13 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Sep 2019 03:21:12 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,484,1559545200"; d="scan'208";a="208921477" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by fmsmga004.fm.intel.com with ESMTP; 09 Sep 2019 03:21:13 -0700 Received: from fmsmsx155.amr.corp.intel.com (10.18.116.71) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 9 Sep 2019 03:21:12 -0700 Received: from shsmsx106.ccr.corp.intel.com (10.239.4.159) by FMSMSX155.amr.corp.intel.com (10.18.116.71) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 9 Sep 2019 03:21:12 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.92]) by SHSMSX106.ccr.corp.intel.com ([169.254.10.86]) with mapi id 14.03.0439.000; Mon, 9 Sep 2019 18:21:11 +0800 From: "Wang, Ying A" To: "Ye, Xiaolong" CC: "Zhang, Qi Z" , "Yang, Qiming" , "dev@dpdk.org" , "Zhao1, Wei" Thread-Topic: [PATCH 2/4] net/ice: rework for generic flow enabling Thread-Index: AQHVYus423zjMsZ48E6uuQEvVO4coaceT/IAgARH+9CAAAUhgIAAjYBw Date: Mon, 9 Sep 2019 10:21:09 +0000 Message-ID: <44DE8E8A53B4014CA1985CEE86C07F2A0B98A12E@SHSMSX101.ccr.corp.intel.com> References: <20190903221522.151382-1-ying.a.wang@intel.com> <20190903221522.151382-3-ying.a.wang@intel.com> <20190906161258.GA108591@intel.com> <44DE8E8A53B4014CA1985CEE86C07F2A0B989DD6@SHSMSX101.ccr.corp.intel.com> <20190909095359.GA25843@intel.com> In-Reply-To: <20190909095359.GA25843@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-ctpclassification: CTP_NT x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNjZjOWMxYzgtOWM0My00OTk4LTk0Y2ItZWI4ZjJkN2FjMTcyIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiZ2xXSk1uTEprazdNU3lDeXZMblJOSDBnZW15a2VudWNMZ2NXcE9KK2thOGU0ZzJHTjZtMGJoUHZ1UWd3NTZwViJ9 x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH 2/4] net/ice: rework for generic flow enabling X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Ye, Xiaolong > Sent: Monday, September 9, 2019 5:54 PM > To: Wang, Ying A > Cc: Zhang, Qi Z ; Yang, Qiming > ; dev@dpdk.org; Zhao1, Wei > Subject: Re: [PATCH 2/4] net/ice: rework for generic flow enabling >=20 > On 09/09, Wang, Ying A wrote: > >> >+ice_unregister_parser(struct ice_flow_parser *parser, > >> >+ struct ice_adapter *ad) > >> >+{ > >> >+ struct ice_pf *pf =3D &ad->pf; > >> >+ struct ice_parser_list *list; > >> >+ struct ice_flow_parser *p_parser; > >> >+ void *temp; > >> >+ > >> >+ switch (parser->stage) { > >> >+ case ICE_FLOW_STAGE_RSS: > >> >+ list =3D &pf->rss_parser_list; > >> >+ break; > >> >+ case ICE_FLOW_STAGE_PERMISSION: > >> >+ list =3D &pf->perm_parser_list; > >> >+ break; > >> >+ case ICE_FLOW_STAGE_DISTRIBUTOR: > >> >+ list =3D &pf->dist_parser_list; > >> >+ break; > >> >+ default: > >> >+ return; > >> >+ } > >> > >> The switch blocks in above functions are the same, it's better to use > >> a common function to reduce the duplicated code. > > > >The switch blocks in the above two functions have little difference in t= he > default behavior, one is return -EINVAL, the other is just return, for > register/unregister funcs have different return value types. So, Can I ju= st keep > this format? > > >=20 > Duplication is bad and I think it should be easy to deal with the return = type > difference, >=20 > struct ice_prase_list * > ice_get_parser_list(struct ice_flow_parser *parser, > struct ice_adapter *ad) > { > struct ice_parser_list *list =3D NULL; > struct ice_pf *pf =3D &ad->pf; >=20 > switch (parser->stage) { > case ICE_FLOW_STAGE_RSS: > list =3D &pf->rss_parser_list; > break; > case ICE_FLOW_STAGE_PERMISSION: > list =3D &pf->perm_parser_list; > break; > case ICE_FLOW_STAGE_DISTRIBUTOR: > list =3D &pf->dist_parser_list; > break; > default: > break; > } >=20 > return list; > } >=20 > Then you just need to check its return value, if it's NULL, simply return= -EINVAL > on register and directly return on unregister. OK, thanks for your guidance. I will fix it in v2. >=20 > Thanks, > Xiaolong