From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6CBE9A050F; Wed, 18 Dec 2019 11:06:26 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 151251B3BB; Wed, 18 Dec 2019 11:06:15 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id ED4AA5681 for ; Wed, 18 Dec 2019 11:06:12 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from dekelp@mellanox.com) with ESMTPS (AES256-SHA encrypted); 18 Dec 2019 12:06:05 +0200 Received: from mtl-vdi-280.wap.labs.mlnx. (mtl-vdi-280.wap.labs.mlnx [10.128.130.87]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id xBIA64Xh010229; Wed, 18 Dec 2019 12:06:05 +0200 From: Dekel Peled To: matan@mellanox.com, viacheslavo@mellanox.com, shahafs@mellanox.com Cc: orika@mellanox.com, dev@dpdk.org, stable@dpdk.org Date: Wed, 18 Dec 2019 12:05:46 +0200 Message-Id: <45ca8bcef623acf4559e2e076417098d9bed77c3.1576663258.git.dekelp@mellanox.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: References: Subject: [dpdk-dev] [PATCH 1/2] net/mlx5: fix setting of Rx hash fields X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Rx hash fields were copied from input parameter into TIR attributes directly, with no translation. As result the copied value was wrong. This patch adds translation of value from input bitmap to the appropriate format. Fixes: dc9ceff73c99 ("net/mlx5: create advanced RxQ via DevX") Cc: stable@dpdk.org Signed-off-by: Dekel Peled Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5_flow.h | 21 +++++++++++++++++++++ drivers/net/mlx5/mlx5_rxq.c | 29 +++++++++++++++++++++++++++-- 2 files changed, 48 insertions(+), 2 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 3fff5dd..db12715 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -288,6 +288,27 @@ enum mlx5_feature_name { /* IBV hash source bits for IPV6. */ #define MLX5_IPV6_IBV_RX_HASH (IBV_RX_HASH_SRC_IPV6 | IBV_RX_HASH_DST_IPV6) +/* IBV hash bits for L3 SRC. */ +#define MLX5_L3_SRC_IBV_RX_HASH (IBV_RX_HASH_SRC_IPV4 | IBV_RX_HASH_SRC_IPV6) + +/* IBV hash bits for L3 DST. */ +#define MLX5_L3_DST_IBV_RX_HASH (IBV_RX_HASH_DST_IPV4 | IBV_RX_HASH_DST_IPV6) + +/* IBV hash bits for TCP. */ +#define MLX5_TCP_IBV_RX_HASH (IBV_RX_HASH_SRC_PORT_TCP | \ + IBV_RX_HASH_DST_PORT_TCP) + +/* IBV hash bits for UDP. */ +#define MLX5_UDP_IBV_RX_HASH (IBV_RX_HASH_SRC_PORT_UDP | \ + IBV_RX_HASH_DST_PORT_UDP) + +/* IBV hash bits for L4 SRC. */ +#define MLX5_L4_SRC_IBV_RX_HASH (IBV_RX_HASH_SRC_PORT_TCP | \ + IBV_RX_HASH_SRC_PORT_UDP) + +/* IBV hash bits for L4 DST. */ +#define MLX5_L4_DST_IBV_RX_HASH (IBV_RX_HASH_DST_PORT_TCP | \ + IBV_RX_HASH_DST_PORT_UDP) /* Geneve header first 16Bit */ #define MLX5_GENEVE_VER_MASK 0x3 diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index 986ec01..906ff0e 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -36,6 +36,7 @@ #include "mlx5_autoconf.h" #include "mlx5_defs.h" #include "mlx5_glue.h" +#include "mlx5_flow.h" /* Default RSS hash key also used for ConnectX-3. */ uint8_t rss_hash_default_key[] = { @@ -2452,6 +2453,7 @@ struct mlx5_hrxq * } } else { /* ind_tbl->type == MLX5_IND_TBL_TYPE_DEVX */ struct mlx5_devx_tir_attr tir_attr; + struct mlx5_rx_hash_field_select *rx_hash_field_select; uint32_t i; uint32_t lro = 1; @@ -2465,8 +2467,31 @@ struct mlx5_hrxq * memset(&tir_attr, 0, sizeof(tir_attr)); tir_attr.disp_type = MLX5_TIRC_DISP_TYPE_INDIRECT; tir_attr.rx_hash_fn = MLX5_RX_HASH_FN_TOEPLITZ; - memcpy(&tir_attr.rx_hash_field_selector_outer, &hash_fields, - sizeof(uint64_t)); +#ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT + tir_attr.tunneled_offload_en = !!tunnel; + /* Translate hash_fields bitmap to PRM format. */ + rx_hash_field_select = hash_fields & IBV_RX_HASH_INNER ? + &tir_attr.rx_hash_field_selector_inner : + &tir_attr.rx_hash_field_selector_outer; +#else + rx_hash_field_select = &tir_attr.rx_hash_field_selector_outer; +#endif + /* 1 bit: 0: IPv4, 1: IPv6. */ + rx_hash_field_select->l3_prot_type = + !!(hash_fields & MLX5_IPV6_IBV_RX_HASH); + /* 1 bit: 0: TCP, 1: UDP. */ + rx_hash_field_select->l4_prot_type = + !!(hash_fields & MLX5_UDP_IBV_RX_HASH); + /* Bitmask which sets which fields to use in RX Hash. */ + rx_hash_field_select->selected_fields = + ((!!(hash_fields & MLX5_L3_SRC_IBV_RX_HASH)) << + MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP) | + (!!(hash_fields & MLX5_L3_DST_IBV_RX_HASH)) << + MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP | + (!!(hash_fields & MLX5_L4_SRC_IBV_RX_HASH)) << + MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT | + (!!(hash_fields & MLX5_L4_DST_IBV_RX_HASH)) << + MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT; if (rxq_ctrl->obj->type == MLX5_RXQ_OBJ_TYPE_DEVX_HAIRPIN) tir_attr.transport_domain = priv->sh->td->id; else -- 1.8.3.1