From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id D6AAE2C18 for ; Mon, 10 Dec 2018 14:06:14 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 10 Dec 2018 05:06:13 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,338,1539673200"; d="scan'208";a="99513020" Received: from aburakov-mobl1.ger.corp.intel.com (HELO [10.237.220.93]) ([10.237.220.93]) by orsmga006.jf.intel.com with ESMTP; 10 Dec 2018 05:06:12 -0800 To: David Hunt , dev@dpdk.org Cc: lei.a.yao@intel.com References: <20181122170220.55482-1-david.hunt@intel.com> <20181122170220.55482-4-david.hunt@intel.com> From: "Burakov, Anatoly" Message-ID: <472ceb5c-7c2c-854c-7ad4-16dd8702ffc1@intel.com> Date: Mon, 10 Dec 2018 13:06:11 +0000 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.3.2 MIME-Version: 1.0 In-Reply-To: <20181122170220.55482-4-david.hunt@intel.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH v1 3/4] examples/power: allow vms to use lcores over 63 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 10 Dec 2018 13:06:15 -0000 On 22-Nov-18 5:02 PM, David Hunt wrote: > Extending the functionality to allow vms to power manage cores beyond 63. > > Signed-off-by: David Hunt > --- > examples/vm_power_manager/channel_manager.c | 59 ++++++++------------- > examples/vm_power_manager/channel_manager.h | 30 ++--------- > examples/vm_power_manager/channel_monitor.c | 56 +++++++------------ > examples/vm_power_manager/vm_power_cli.c | 4 +- > 4 files changed, 48 insertions(+), 101 deletions(-) > > diff --git a/examples/vm_power_manager/channel_manager.c b/examples/vm_power_manager/channel_manager.c > index 5af4996db..3d493c179 100644 > --- a/examples/vm_power_manager/channel_manager.c > +++ b/examples/vm_power_manager/channel_manager.c > @@ -49,7 +49,7 @@ static bool global_hypervisor_available; > */ > struct virtual_machine_info { > char name[CHANNEL_MGR_MAX_NAME_LEN]; > - rte_atomic64_t pcpu_mask[CHANNEL_CMDS_MAX_CPUS]; > + uint16_t pcpu_map[CHANNEL_CMDS_MAX_CPUS]; > struct channel_info *channels[CHANNEL_CMDS_MAX_VM_CHANNELS]; > char channel_mask[POWER_MGR_MAX_CPUS]; > uint8_t num_channels; > @@ -79,7 +79,7 @@ update_pcpus_mask(struct virtual_machine_info *vm_info) > virVcpuInfoPtr cpuinfo; > unsigned i, j; > int n_vcpus; > - uint64_t mask; > + uint16_t pcpu; > > memset(global_cpumaps, 0, CHANNEL_CMDS_MAX_CPUS*global_maplen); > > @@ -120,26 +120,23 @@ update_pcpus_mask(struct virtual_machine_info *vm_info) > vm_info->info.nrVirtCpu = n_vcpus; > } > for (i = 0; i < vm_info->info.nrVirtCpu; i++) { > - mask = 0; > + pcpu = 0; > for (j = 0; j < global_n_host_cpus; j++) { > if (VIR_CPU_USABLE(global_cpumaps, global_maplen, i, j) > 0) { > - mask |= 1ULL << j; > + pcpu = j; Not sure what this does. Initial code goes through all CPU's, marks all that are usable into mask (i.e. code implies there can be several), and then sets up this mask. Now, you're going through all CPU's, store *one* arbitrary CPU index, and set the map up with that single index. That doesn't look like an equivalent replacement. > } > } > - rte_atomic64_set(&vm_info->pcpu_mask[i], mask); > + vm_info->pcpu_map[i] = pcpu; > } > return 0; > } > > int > -set_pcpus_mask(char *vm_name, unsigned int vcpu, char *core_mask) > +set_pcpu(char *vm_name, unsigned int vcpu, unsigned int pcpu) See patch 1 comments - it would've made this change easier to parse if set_pcpu was removed there, instead of here. > { > unsigned i = 0; > int flags = VIR_DOMAIN_AFFECT_LIVE|VIR_DOMAIN_AFFECT_CONFIG; > struct virtual_machine_info *vm_info; > - char mask[POWER_MGR_MAX_CPUS]; > - > - memcpy(mask, core_mask, POWER_MGR_MAX_CPUS); > > if (vcpu >= CHANNEL_CMDS_MAX_CPUS) { > RTE_LOG(ERR, CHANNEL_MANAGER, "vCPU(%u) exceeds max allowable(%d)\n", > @@ -166,17 +163,16 @@ set_pcpus_mask(char *vm_name, unsigned int vcpu, char *core_mask) > return -1; > } > memset(global_cpumaps, 0 , CHANNEL_CMDS_MAX_CPUS * global_maplen); > - for (i = 0; i < POWER_MGR_MAX_CPUS; i++) { > - if (mask[i] == 1) { > - VIR_USE_CPU(global_cpumaps, i); > - if (i >= global_n_host_cpus) { > - RTE_LOG(ERR, CHANNEL_MANAGER, "CPU(%u) exceeds the available " > - "number of CPUs(%u)\n", > - i, global_n_host_cpus); > - return -1; > - } > - } > + > + VIR_USE_CPU(global_cpumaps, i); > + > + if (pcpu >= global_n_host_cpus) { > + RTE_LOG(ERR, CHANNEL_MANAGER, "CPU(%u) exceeds the available " > + "number of CPUs(%u)\n", > + i, global_n_host_cpus); > + return -1; > } Some comments on what the above code does would have been nice. Why the check was removed? > + -- Thanks, Anatoly