From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1C31E41CF6; Mon, 20 Feb 2023 07:57:38 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id F3F4142F82; Mon, 20 Feb 2023 07:57:37 +0100 (CET) Received: from szxga02-in.huawei.com (szxga02-in.huawei.com [45.249.212.188]) by mails.dpdk.org (Postfix) with ESMTP id 5946640395; Mon, 20 Feb 2023 07:57:35 +0100 (CET) Received: from dggpeml500024.china.huawei.com (unknown [172.30.72.56]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4PKtT82HndzRsDy; Mon, 20 Feb 2023 14:54:52 +0800 (CST) Received: from [10.67.100.224] (10.67.100.224) by dggpeml500024.china.huawei.com (7.185.36.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.17; Mon, 20 Feb 2023 14:57:32 +0800 Subject: Re: [PATCH 2/2] ethdev: fix race condition in fast-path ops setup To: Ashok Kaladi , , CC: , , , , , Ruifeng Wang References: <20230220060839.1267349-1-ashok.k.kaladi@intel.com> <20230220060839.1267349-2-ashok.k.kaladi@intel.com> From: fengchengwen Message-ID: <4786db4b-63dc-5329-522d-77eb58d4cff4@huawei.com> Date: Mon, 20 Feb 2023 14:57:32 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.11.0 MIME-Version: 1.0 In-Reply-To: <20230220060839.1267349-2-ashok.k.kaladi@intel.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.67.100.224] X-ClientProxiedBy: dggems706-chm.china.huawei.com (10.3.19.183) To dggpeml500024.china.huawei.com (7.185.36.10) X-CFilter-Loop: Reflected X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On 2023/2/20 14:08, Ashok Kaladi wrote: > If ethdev enqueue or dequeue function is called during > eth_dev_fp_ops_setup(), it may get pre-empted after setting > the function pointers, but before setting the pointer to port data. > In this case the newly registered enqueue/dequeue function will use > dummy port data and end up in seg fault. > > This patch moves the updation of each data pointers before updating > corresponding function pointers. > > Fixes: c87d435a4d79 ("ethdev: copy fast-path API into separate structure") > Cc: stable@dpdk.org > > Signed-off-by: Ashok Kaladi > > diff --git a/lib/ethdev/ethdev_private.c b/lib/ethdev/ethdev_private.c > index 48090c879a..a0232c669f 100644 > --- a/lib/ethdev/ethdev_private.c > +++ b/lib/ethdev/ethdev_private.c > @@ -270,17 +270,17 @@ void > eth_dev_fp_ops_setup(struct rte_eth_fp_ops *fpo, > const struct rte_eth_dev *dev) > { > + fpo->rxq.data = dev->data->rx_queues; > fpo->rx_pkt_burst = dev->rx_pkt_burst; > + fpo->txq.data = dev->data->tx_queues; > fpo->tx_pkt_burst = dev->tx_pkt_burst; > fpo->tx_pkt_prepare = dev->tx_pkt_prepare; > fpo->rx_queue_count = dev->rx_queue_count; > fpo->rx_descriptor_status = dev->rx_descriptor_status; > fpo->tx_descriptor_status = dev->tx_descriptor_status; > > - fpo->rxq.data = dev->data->rx_queues; > fpo->rxq.clbk = (void **)(uintptr_t)dev->post_rx_burst_cbs; > > - fpo->txq.data = dev->data->tx_queues; > fpo->txq.clbk = (void **)(uintptr_t)dev->pre_tx_burst_cbs; Hi Ashok, The modification is OK for the x86 platform (which has strong memory order, and will keep write-after-write order in here, and read-after-read in rte_eth_rx/tx_burst), but for other weak memory order (like ARM platform) will fail. For the weak memory order, suggest add write-mb in here, and read-mb in rte_eth_rx/tx_burst. But the read-mb in rte_eth_rx/tx_burst will affect performance, especially the variable will changes only once when start. So I suggest use write-mb + delay in here: fpo->rxq.data = dev->data->rx_queues; fpo->txq.data = dev->data->tx_queues; mdelay(5); // delay e.g. 5ms fpo->rx_pkt_burst = dev->rx_pkt_burst; fpo->tx_pkt_burst = dev->tx_pkt_burst; And also cc ARMv8 maintainer. > } > >