From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id 020395A30 for ; Mon, 30 May 2016 12:05:15 +0200 (CEST) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga103.fm.intel.com with ESMTP; 30 May 2016 03:05:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.26,389,1459839600"; d="scan'208";a="965050969" Received: from irsmsx107.ger.corp.intel.com ([163.33.3.99]) by orsmga001.jf.intel.com with ESMTP; 30 May 2016 03:05:13 -0700 Received: from irsmsx155.ger.corp.intel.com (163.33.192.3) by IRSMSX107.ger.corp.intel.com (163.33.3.99) with Microsoft SMTP Server (TLS) id 14.3.248.2; Mon, 30 May 2016 11:05:12 +0100 Received: from irsmsx102.ger.corp.intel.com ([169.254.2.10]) by irsmsx155.ger.corp.intel.com ([169.254.14.34]) with mapi id 14.03.0248.002; Mon, 30 May 2016 11:05:12 +0100 From: "Azarewicz, PiotrX T" To: John Daley , Nelson Escobar CC: "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH v2 09/11] enic: optimize the Tx function Thread-Index: AQHRtYZkVsErx90a50Cmdiqnz5QYxp/RQlXw Date: Mon, 30 May 2016 10:05:11 +0000 Message-ID: <4837007523CC9A4B9414D20C13DE6E64136CEDBC@IRSMSX102.ger.corp.intel.com> References: <1464071579-30072-1-git-send-email-johndale@cisco.com> <1464071579-30072-10-git-send-email-johndale@cisco.com> In-Reply-To: <1464071579-30072-10-git-send-email-johndale@cisco.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [163.33.239.182] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2 09/11] enic: optimize the Tx function X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 30 May 2016 10:05:16 -0000 Hi, > uint16_t enic_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, > uint16_t nb_pkts) > { > uint16_t index; > - unsigned int frags; > - unsigned int pkt_len; > - unsigned int seg_len; > - unsigned int inc_len; > + unsigned int pkt_len, data_len; > unsigned int nb_segs; > - struct rte_mbuf *tx_pkt, *next_tx_pkt; > + struct rte_mbuf *tx_pkt; > struct vnic_wq *wq =3D (struct vnic_wq *)tx_queue; > struct enic *enic =3D vnic_dev_priv(wq->vdev); > unsigned short vlan_id; > unsigned short ol_flags; Above ol_flags should be uint64_t. > - uint8_t last_seg, eop; > - unsigned int host_tx_descs =3D 0; > + unsigned int wq_desc_avail; > + int head_idx; > + struct vnic_wq_buf *buf; > + unsigned int hw_ip_cksum_enabled; > + unsigned int desc_count; > + struct wq_enet_desc *descs, *desc_p, desc_tmp; > + uint16_t mss; > + uint8_t vlan_tag_insert; > + uint8_t eop; > + uint64_t bus_addr; >=20 > + enic_cleanup_wq(enic, wq); > + wq_desc_avail =3D vnic_wq_desc_avail(wq); > + head_idx =3D wq->head_idx; > + desc_count =3D wq->ring.desc_count; > + > + nb_pkts =3D RTE_MIN(nb_pkts, ENIC_TX_XMIT_MAX); > + > + hw_ip_cksum_enabled =3D enic->hw_ip_checksum; > for (index =3D 0; index < nb_pkts; index++) { > tx_pkt =3D *tx_pkts++; > - inc_len =3D 0; > nb_segs =3D tx_pkt->nb_segs; > - if (nb_segs > vnic_wq_desc_avail(wq)) { > + if (nb_segs > wq_desc_avail) { > if (index > 0) > - enic_post_wq_index(wq); > - > - /* wq cleanup and try again */ > - if (!enic_cleanup_wq(enic, wq) || > - (nb_segs > vnic_wq_desc_avail(wq))) { > - return index; > - } > + goto post; > + goto done; > } >=20 > pkt_len =3D tx_pkt->pkt_len; > + data_len =3D tx_pkt->data_len; > vlan_id =3D tx_pkt->vlan_tci; > ol_flags =3D tx_pkt->ol_flags; Cause you may miss a lot of flags in here. Piotr > - for (frags =3D 0; inc_len < pkt_len; frags++) { > - if (!tx_pkt) > - break; > - next_tx_pkt =3D tx_pkt->next; > - seg_len =3D tx_pkt->data_len; > - inc_len +=3D seg_len; > - > - host_tx_descs++; > - last_seg =3D 0; > - eop =3D 0; > - if ((pkt_len =3D=3D inc_len) || !next_tx_pkt) { > - eop =3D 1; > - /* post if last packet in batch or > thresh */ > - if ((index =3D=3D (nb_pkts - 1)) || > - (host_tx_descs > ENIC_TX_POST_THRESH)) > { > - last_seg =3D 1; > - host_tx_descs =3D 0; > - } > + > + mss =3D 0; > + vlan_tag_insert =3D 0; > + bus_addr =3D (dma_addr_t) > + (tx_pkt->buf_physaddr + tx_pkt->data_off); > + > + descs =3D (struct wq_enet_desc *)wq->ring.descs; > + desc_p =3D descs + head_idx; > + > + eop =3D (data_len =3D=3D pkt_len); > + > + if (ol_flags & PKT_TX_VLAN_PKT) > + vlan_tag_insert =3D 1; > + > + if (hw_ip_cksum_enabled && (ol_flags & > PKT_TX_IP_CKSUM)) > + mss |=3D ENIC_CALC_IP_CKSUM; > + > + if (hw_ip_cksum_enabled && (ol_flags & > PKT_TX_TCP_UDP_CKSUM)) > + mss |=3D ENIC_CALC_TCP_UDP_CKSUM; > + > + wq_enet_desc_enc(&desc_tmp, bus_addr, data_len, mss, 0, > 0, eop, > + eop, 0, vlan_tag_insert, vlan_id, 0); > + > + *desc_p =3D desc_tmp; > + buf =3D &wq->bufs[head_idx]; > + buf->mb =3D (void *)tx_pkt; > + head_idx =3D enic_ring_incr(desc_count, head_idx); > + wq_desc_avail--; > + > + if (!eop) { > + for (tx_pkt =3D tx_pkt->next; tx_pkt; tx_pkt =3D > + tx_pkt->next) { > + data_len =3D tx_pkt->data_len; > + > + if (tx_pkt->next =3D=3D NULL) > + eop =3D 1; > + desc_p =3D descs + head_idx; > + bus_addr =3D (dma_addr_t)(tx_pkt- > >buf_physaddr > + + tx_pkt->data_off); > + wq_enet_desc_enc((struct wq_enet_desc *) > + &desc_tmp, bus_addr, > data_len, > + mss, 0, 0, eop, eop, 0, > + vlan_tag_insert, vlan_id, 0); > + > + *desc_p =3D desc_tmp; > + buf =3D &wq->bufs[head_idx]; > + buf->mb =3D (void *)tx_pkt; > + head_idx =3D enic_ring_incr(desc_count, > head_idx); > + wq_desc_avail--; > } > - enic_send_pkt(enic, wq, tx_pkt, (unsigned > short)seg_len, > - !frags, eop, last_seg, ol_flags, vlan_id); > - tx_pkt =3D next_tx_pkt; > } > } > + post: > + rte_wmb(); > + iowrite32(head_idx, &wq->ctrl->posted_index); > + done: > + wq->ring.desc_avail =3D wq_desc_avail; > + wq->head_idx =3D head_idx; >=20 > - enic_cleanup_wq(enic, wq); > return index; > } > + > + > -- > 2.7.0