From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id DD97D37A8 for ; Mon, 13 Feb 2017 04:17:16 +0100 (CET) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga105.jf.intel.com with ESMTP; 12 Feb 2017 19:17:15 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.35,155,1484035200"; d="scan'208";a="820154189" Received: from kmsmsx153.gar.corp.intel.com ([172.21.73.88]) by FMSMGA003.fm.intel.com with ESMTP; 12 Feb 2017 19:17:14 -0800 Received: from pgsmsx106.gar.corp.intel.com ([169.254.9.9]) by KMSMSX153.gar.corp.intel.com ([172.21.73.88]) with mapi id 14.03.0248.002; Mon, 13 Feb 2017 11:17:10 +0800 From: "Dai, Wei" To: Olivier MATZ CC: Laurent Hardy , "Zhang, Helin" , "Ananyev, Konstantin" , "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH] net/ixgbe: ensure link status is updated Thread-Index: AQHSQPhNTNmAGECDg0GKRm86FpOgSaFfs7ug//+evYCAB3nhwA== Date: Mon, 13 Feb 2017 03:17:08 +0000 Message-ID: <49759EB36A64CF4892C1AFEC9231E8D63A3676C5@PGSMSX106.gar.corp.intel.com> References: <1479403792-11928-1-git-send-email-laurent.hardy@6wind.com> <49759EB36A64CF4892C1AFEC9231E8D63A359376@PGSMSX106.gar.corp.intel.com> <20170208180325.6e83f31c@glumotte.dev.6wind.com> In-Reply-To: <20170208180325.6e83f31c@glumotte.dev.6wind.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYTg5MGYwMzItMzYwZi00MDFlLWEyYjMtNDkwMWMyMDUwNDY1IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6InNKUFBXdHV3OTg3VHN5RThvR0J2dXNJR1Zrckh4VkVZWTRPQzJjbGFBekk9In0= x-ctpclassification: CTP_IC x-originating-ip: [172.30.20.205] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH] net/ixgbe: ensure link status is updated X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 13 Feb 2017 03:17:17 -0000 > -----Original Message----- > From: Olivier MATZ [mailto:olivier.matz@6wind.com] > Sent: Thursday, February 9, 2017 1:03 AM > To: Dai, Wei > Cc: Laurent Hardy ; Zhang, Helin > ; Ananyev, Konstantin > ; dev@dpdk.org > Subject: Re: [dpdk-dev] [PATCH] net/ixgbe: ensure link status is updated >=20 > Hi Wei, >=20 > On Wed, 8 Feb 2017 15:51:42 +0000, "Dai, Wei" wrote: > > > -----Original Message----- > > > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Laurent Hardy > > > Sent: Friday, November 18, 2016 1:30 AM > > > To: Zhang, Helin ; Ananyev, Konstantin > > > > > > Cc: dev@dpdk.org > > > Subject: [dpdk-dev] [PATCH] net/ixgbe: ensure link status is updated > > > > > > In case of link speed set to 1Gb at peer side (with autoneg or with > > > defined speed) and cable not plugged-in when device is configured > > > and started, then link status is not updated properly with new speed > > > as no link setup is triggered. > > > > > > To avoid this issue, IXGBE_FLAG_NEED_LINK_CONFIG is set to try a > > > link setup each time link_update() is triggered and current link > > > status is down. When cable is plugged-in, link setup will be > > > performed via ixgbe_setup_link(). > > > > > > Signed-off-by: Laurent Hardy > > > --- > > > drivers/net/ixgbe/ixgbe_ethdev.c | 20 ++++++++++++++++++++ > > > drivers/net/ixgbe/ixgbe_ethdev.h | 1 + > > > 2 files changed, 21 insertions(+) > > > > > > diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c > > > b/drivers/net/ixgbe/ixgbe_ethdev.c > > > index 52ebbe4..513d1d5 100644 > > > --- a/drivers/net/ixgbe/ixgbe_ethdev.c > > > +++ b/drivers/net/ixgbe/ixgbe_ethdev.c > > > @@ -2095,6 +2095,7 @@ ixgbe_dev_configure(struct rte_eth_dev *dev) > > > > > > /* set flag to update link status after init */ > > > intr->flags |=3D IXGBE_FLAG_NEED_LINK_UPDATE; > > > + intr->flags |=3D IXGBE_FLAG_NEED_LINK_CONFIG; > > > > > > /* > > > * Initialize to TRUE. If any of Rx queues doesn't meet the bulk > > > @@ -3117,8 +3118,12 @@ ixgbe_dev_link_update(struct rte_eth_dev > > > *dev, int wait_to_complete) > > > struct ixgbe_hw *hw =3D > > > IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); > > > struct rte_eth_link link, old; > > > ixgbe_link_speed link_speed =3D IXGBE_LINK_SPEED_UNKNOWN; > > > + struct ixgbe_interrupt *intr =3D > > > + IXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private); > > > int link_up; > > > int diag; > > > + u32 speed =3D 0; > > > + bool autoneg =3D false; > > > > > > link.link_status =3D ETH_LINK_DOWN; > > > link.link_speed =3D 0; > > > @@ -3128,6 +3133,19 @@ ixgbe_dev_link_update(struct rte_eth_dev > > > *dev, int wait_to_complete) > > > > > > hw->mac.get_link_status =3D true; > > > > > > + if (intr->flags & IXGBE_FLAG_NEED_LINK_CONFIG) { > > > + speed =3D hw->phy.autoneg_advertised; > > > + if (!speed) { > > > + ixgbe_get_link_capabilities(hw, &speed, > > > &autoneg); > > > + /* setup the highest link when no autoneg > > > */ > > > + if (!autoneg) { > > > + if (speed & > > > IXGBE_LINK_SPEED_10GB_FULL) > > > + speed =3D > > > IXGBE_LINK_SPEED_10GB_FULL; > > > + } > > > + } > > > + ixgbe_setup_link(hw, speed, true); > > > + } > > > + > > > /* check if it needs to wait to complete, if lsc interrupt is > > > enabled */ if (wait_to_complete =3D=3D 0 || > > > dev->data->dev_conf.intr_conf.lsc !=3D 0) diag =3D ixgbe_check_link(h= w, > > > &link_speed, &link_up, 0); @@ -3145,10 +3163,12 @@ > > > ixgbe_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete) > > > > > > if (link_up =3D=3D 0) { > > > rte_ixgbe_dev_atomic_write_link_status(dev, &link); > > > + intr->flags |=3D IXGBE_FLAG_NEED_LINK_CONFIG; > > > if (link.link_status =3D=3D old.link_status) > > > return -1; > > > return 0; > > > } > > > + intr->flags &=3D ~IXGBE_FLAG_NEED_LINK_CONFIG; > > > link.link_status =3D ETH_LINK_UP; > > > link.link_duplex =3D ETH_LINK_FULL_DUPLEX; > > > > > > diff --git a/drivers/net/ixgbe/ixgbe_ethdev.h > > > b/drivers/net/ixgbe/ixgbe_ethdev.h > > > index e060c3d..9d335ba 100644 > > > --- a/drivers/net/ixgbe/ixgbe_ethdev.h > > > +++ b/drivers/net/ixgbe/ixgbe_ethdev.h > > > @@ -43,6 +43,7 @@ > > > #define IXGBE_FLAG_NEED_LINK_UPDATE (uint32_t)(1 << 0) > > > #define IXGBE_FLAG_MAILBOX (uint32_t)(1 << 1) > > > #define IXGBE_FLAG_PHY_INTERRUPT (uint32_t)(1 << 2) > > > +#define IXGBE_FLAG_NEED_LINK_CONFIG (uint32_t)(1 << 3) > > > > Now there is following macro in DPDK 17.02-rc2. > > #define IXGBE_FLAG_MACSEC (uint32_t)(1 << 3) > > You can redefine it as #define IXGBE_FLAG_NEED_LINK_CONFIG > > (uint32_t)(1 << 4) >=20 > Thanks, I'll send a v2. >=20 > Do you agree with the rest of the patch? So far I have no disagree opinions about the reset of this patch. >=20 >=20 > Regards, > Olivier