From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 567701B68C; Fri, 3 Nov 2017 06:51:49 +0100 (CET) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 02 Nov 2017 22:51:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,337,1505804400"; d="scan'208";a="1239151565" Received: from pgsmsx108.gar.corp.intel.com ([10.221.44.103]) by fmsmga002.fm.intel.com with ESMTP; 02 Nov 2017 22:51:47 -0700 Received: from pgsmsx111.gar.corp.intel.com ([169.254.2.207]) by PGSMSX108.gar.corp.intel.com ([169.254.8.194]) with mapi id 14.03.0319.002; Fri, 3 Nov 2017 13:51:45 +0800 From: "Dai, Wei" To: "Wu, Jingjing" , "Xing, Beilei" , "Liang, Cunming" CC: "dev@dpdk.org" , "stable@dpdk.org" Thread-Topic: [PATCH 2/2] net/i40e: fix Rx queue interrupt mapping in VF Thread-Index: AQHTU94JzBts7aHA2E6nqCLnoCxkYqMBZf4AgADBJhA= Date: Fri, 3 Nov 2017 05:51:45 +0000 Message-ID: <49759EB36A64CF4892C1AFEC9231E8D6515552B5@PGSMSX111.gar.corp.intel.com> References: <1509628256-16300-1-git-send-email-wei.dai@intel.com> <1509628256-16300-3-git-send-email-wei.dai@intel.com> <9BB6961774997848B5B42BEC655768F810EAC791@SHSMSX103.ccr.corp.intel.com> In-Reply-To: <9BB6961774997848B5B42BEC655768F810EAC791@SHSMSX103.ccr.corp.intel.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYzE0NWRiOWYtMThiNC00MDVmLTgxNzItMGFkMGZjNWVmZWUwIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6ImR5TGxnaWY5cTBmQnJSSVpTWHdzZDZnOWlzQktGcHZRcmVGOHRyZ091VVE9In0= x-ctpclassification: CTP_IC dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [172.30.20.206] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH 2/2] net/i40e: fix Rx queue interrupt mapping in VF X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 03 Nov 2017 05:51:50 -0000 Hi, Jingjing=20 Thanks for your feedback. =20 > > Subject: [PATCH 2/2] net/i40e: fix Rx queue interrupt mapping in VF > > > > When a VF port is bound to VFIO-PCI, miscellaneous interrupt is mapped > > to MSI-X vector 0 and Rx queues interrupt are mapped to other vectors > > in vfio_enable_msix( ). To simplify implementation, all VFIO-PCI bound > > i40e VF Rx queue interrupts can be mapped in vector 1. And as current > > igb_uio only support only one vector, i40e VF PMD should use vector 0 > > for igb_uio and vector 1 for VFIO-PCI. Without this patch, VF Rx queue > > interrupt is mapped to vector 0 in register settings and mapped to > > VFIO vector 1 in vfio_enable_msix( ), and then all Rx queue interrupts = will > be missed. > > > > Fixes: 4b90a3ff26c5 ("i40evf: support Rx interrupt") > > Fixes: 975ffea6f671 ("net/i40e: remove DPDK PF version specific code") > > Cc: stable@dpdk.org > > > > Signed-off-by: Wei Dai > > --- > > drivers/net/i40e/i40e_ethdev_vf.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/net/i40e/i40e_ethdev_vf.c > > b/drivers/net/i40e/i40e_ethdev_vf.c > > index 567b7d0..94fb4b1 100644 > > --- a/drivers/net/i40e/i40e_ethdev_vf.c > > +++ b/drivers/net/i40e/i40e_ethdev_vf.c > > @@ -654,7 +654,7 @@ i40evf_config_irq_map(struct rte_eth_dev *dev) > > int i, err; > > > > if (rte_intr_allow_others(intr_handle)) > > - vector_id =3D I40EVF_VSI_DEFAULT_MSIX_INTR_LNX; > > + vector_id =3D I40EVF_VSI_DEFAULT_MSIX_INTR; >=20 > Firstly, We can use I40E_MISC_VEC_ID and I40E_RX_VEC_START to replace > I40EVF_VSI_DEFAULT_MSIX_INTR_LNX and > I40EVF_VSI_DEFAULT_MSIX_INTR. It looks good using I40E_RX_VEC_START instead of I40EVF_VSI_DEFAULT_MSIX_IN= TR. >=20 > You need to check if rx interrupt is enabled or not, if not we should use > I40E_MISC_VEC_ID. > If rx interrupt is enabled, and rte_intr_allow_others(intr_handle) is tru= e, then > use I40E_RX_VEC_START. Yes I have tested it and confirm Rx interrupt is enabled with l3fwd-power. >=20 > And I think in VFIO cases, we can use more than one interrupt for the IRQ > mapping. You can refer to the function i40e_vsi_queues_bind_intr. >=20