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Tue, 4 Dec 2018 10:29:48 +0530
From: "Varghese, Vipin" <vipin.varghese@intel.com>
To: "Lu, Wenzhuo" <wenzhuo.lu@intel.com>, "dev@dpdk.org" <dev@dpdk.org>
CC: "Lu, Wenzhuo" <wenzhuo.lu@intel.com>, "Yang, Qiming"
<qiming.yang@intel.com>, "Li, Xiaoyun" <xiaoyun.li@intel.com>, "Wu, Jingjing"
<jingjing.wu@intel.com>
Thread-Topic: [dpdk-dev] [PATCH v2 04/20] net/ice: support getting device
information
Thread-Index: AQHUitZN6TqqQNMXYUas+O8iSe96nqVuBSIA
Date: Tue, 4 Dec 2018 04:59:48 +0000
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Subject: Re: [dpdk-dev] [PATCH v2 04/20] net/ice: support getting
device information
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snipped
> +static void
> +ice_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info
> +*dev_info) {
> + struct ice_pf *pf =3D ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
> + struct ice_hw *hw =3D ICE_DEV_PRIVATE_TO_HW(dev->data-
> >dev_private);
> + struct ice_vsi *vsi =3D pf->main_vsi;
> + struct rte_pci_device *pci_dev =3D RTE_DEV_TO_PCI(dev->device);
> +
> + dev_info->min_rx_bufsize =3D ICE_BUF_SIZE_MIN;
> + dev_info->max_rx_pktlen =3D ICE_FRAME_SIZE_MAX;
> + dev_info->max_rx_queues =3D vsi->nb_qps;
> + dev_info->max_tx_queues =3D vsi->nb_qps;
> + dev_info->max_mac_addrs =3D vsi->max_macaddrs;
> + dev_info->max_vfs =3D pci_dev->max_vfs;
> +
> + dev_info->rx_offload_capa =3D
> + DEV_RX_OFFLOAD_VLAN_STRIP |
> + DEV_RX_OFFLOAD_IPV4_CKSUM |
> + DEV_RX_OFFLOAD_UDP_CKSUM |
> + DEV_RX_OFFLOAD_TCP_CKSUM |
> + DEV_RX_OFFLOAD_QINQ_STRIP |
> + DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
> + DEV_RX_OFFLOAD_VLAN_EXTEND |
> + DEV_RX_OFFLOAD_JUMBO_FRAME;
> + dev_info->tx_offload_capa =3D
> + DEV_TX_OFFLOAD_VLAN_INSERT |
> + DEV_TX_OFFLOAD_QINQ_INSERT |
> + DEV_TX_OFFLOAD_IPV4_CKSUM |
> + DEV_TX_OFFLOAD_UDP_CKSUM |
> + DEV_TX_OFFLOAD_TCP_CKSUM |
> + DEV_TX_OFFLOAD_SCTP_CKSUM |
> + DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
> + DEV_TX_OFFLOAD_TCP_TSO;
> + dev_info->rx_queue_offload_capa =3D 0;
> + dev_info->tx_queue_offload_capa =3D 0;
Does this mean per queue offload capability is not supported? If yes, can y=
ou mention this in release notes under 'support or limitation'
> +
> + dev_info->reta_size =3D hw->func_caps.common_cap.rss_table_size;
> + dev_info->hash_key_size =3D (VSIQF_HKEY_MAX_INDEX + 1) *
> sizeof(uint32_t);
> + dev_info->flow_type_rss_offloads =3D ICE_RSS_OFFLOAD_ALL;
> +
> + dev_info->default_rxconf =3D (struct rte_eth_rxconf) {
> + .rx_thresh =3D {
> + .pthresh =3D ICE_DEFAULT_RX_PTHRESH,
> + .hthresh =3D ICE_DEFAULT_RX_HTHRESH,
> + .wthresh =3D ICE_DEFAULT_RX_WTHRESH,
> + },
> + .rx_free_thresh =3D ICE_DEFAULT_RX_FREE_THRESH,
> + .rx_drop_en =3D 0,
> + .offloads =3D 0,
Is drop function and rx_conf.offload supported ? If yes, if device is not c=
onfigured then all offload should be set?
> + };
> +
> + dev_info->default_txconf =3D (struct rte_eth_txconf) {
> + .tx_thresh =3D {
> + .pthresh =3D ICE_DEFAULT_TX_PTHRESH,
> + .hthresh =3D ICE_DEFAULT_TX_HTHRESH,
> + .wthresh =3D ICE_DEFAULT_TX_WTHRESH,
> + },
> + .tx_free_thresh =3D ICE_DEFAULT_TX_FREE_THRESH,
> + .tx_rs_thresh =3D ICE_DEFAULT_TX_RSBIT_THRESH,
> + .offloads =3D 0,
If device is not configured, is not all offload be set true?
Snipped
> + switch (hw->port_info->phy.link_info.link_speed) {
If device switch is not configured (default value from NVM) should we highl=
ight the switch can support speed 10, 100, 1000, 1000 and son on?
> + case ICE_AQ_LINK_SPEED_10MB:
> + dev_info->speed_capa =3D ETH_LINK_SPEED_10M;
> + break;
> + case ICE_AQ_LINK_SPEED_100MB:
> + dev_info->speed_capa =3D ETH_LINK_SPEED_100M;
> + break;
> + case ICE_AQ_LINK_SPEED_1000MB:
> + dev_info->speed_capa =3D ETH_LINK_SPEED_1G;
> + break;
> + case ICE_AQ_LINK_SPEED_2500MB:
> + dev_info->speed_capa =3D ETH_LINK_SPEED_2_5G;
> + break;
> + case ICE_AQ_LINK_SPEED_5GB:
> + dev_info->speed_capa =3D ETH_LINK_SPEED_5G;
> + break;
> + case ICE_AQ_LINK_SPEED_10GB:
> + dev_info->speed_capa =3D ETH_LINK_SPEED_10G;
> + break;
> + case ICE_AQ_LINK_SPEED_20GB:
> + dev_info->speed_capa =3D ETH_LINK_SPEED_20G;
> + break;
> + case ICE_AQ_LINK_SPEED_25GB:
> + dev_info->speed_capa =3D ETH_LINK_SPEED_25G;
> + break;
> + case ICE_AQ_LINK_SPEED_40GB:
> + dev_info->speed_capa =3D ETH_LINK_SPEED_40G;
> + break;
> + case ICE_AQ_LINK_SPEED_UNKNOWN:
> + default:
> + PMD_DRV_LOG(ERR, "Unknown link speed");
> + dev_info->speed_capa =3D ETH_LINK_SPEED_AUTONEG;
> + break;
> + }
If speed is not true as stated above, can you please add this to release no=
tes and documentation.
> +
> + dev_info->nb_rx_queues =3D dev->data->nb_rx_queues;
> + dev_info->nb_tx_queues =3D dev->data->nb_tx_queues;
> +
> + dev_info->default_rxportconf.burst_size =3D 32;
> + dev_info->default_txportconf.burst_size =3D 32;
> + dev_info->default_rxportconf.nb_queues =3D 1;
> + dev_info->default_txportconf.nb_queues =3D 1;
> + dev_info->default_rxportconf.ring_size =3D 1024;
> + dev_info->default_txportconf.ring_size =3D 1024;=20
Can we use MACRO (in previous PATCH there were MAX_BURST_SIZE)?
}
> --
> 1.9.3