From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 24D7BA00C5; Wed, 14 Sep 2022 22:16:25 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B842B4021D; Wed, 14 Sep 2022 22:16:24 +0200 (CEST) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by mails.dpdk.org (Postfix) with ESMTP id EFA9840156 for ; Wed, 14 Sep 2022 22:16:22 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1663186582; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WVFBsKJ66mw0UlwPpfRlKNaawEbJN075gsIYmG5ThT8=; b=a/ilgkK3Osl6ANSvV3Otp1RvdRwSEiMgaWMx6y0MoJRdE6/p77Gq969RPKtVfpLMixAkFL 7sxNtZU3P9Ed9OrVMUrV6UJQjQSYDBw6FvEX2HF67zcCPmyBNqr4ierZlA1nT2OiG7/o/Q 5tT/2mh4cOy6RP1yIUaEmHCNFbZXyqw= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-455-QX-PNdjEPj2bEGNVTIn7dw-1; Wed, 14 Sep 2022 16:16:19 -0400 X-MC-Unique: QX-PNdjEPj2bEGNVTIn7dw-1 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.rdu2.redhat.com [10.11.54.4]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id AB0C4101E14C; Wed, 14 Sep 2022 20:16:18 +0000 (UTC) Received: from [10.39.208.12] (unknown [10.39.208.12]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 714902027061; Wed, 14 Sep 2022 20:16:17 +0000 (UTC) Message-ID: <4ab4113a-6f46-54a9-7121-6888c0b5c95a@redhat.com> Date: Wed, 14 Sep 2022 22:16:16 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.12.0 To: Hernan Vargas , dev@dpdk.org, gakhil@marvell.com, trix@redhat.com Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com References: <20220820023157.189047-1-hernan.vargas@intel.com> <20220820023157.189047-10-hernan.vargas@intel.com> From: Maxime Coquelin Subject: Re: [PATCH v2 09/37] baseband/acc100: add HARQ index helper function In-Reply-To: <20220820023157.189047-10-hernan.vargas@intel.com> X-Scanned-By: MIMEDefang 3.1 on 10.11.54.4 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On 8/20/22 04:31, Hernan Vargas wrote: > Refactor code to use the HARQ index helper function and make harq_idx > uint32. > > Signed-off-by: Hernan Vargas > --- > drivers/baseband/acc100/rte_acc100_pmd.c | 32 +++++++++++------------- > 1 file changed, 14 insertions(+), 18 deletions(-) > > diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c > index a7e0df96e8..5d09908fd0 100644 > --- a/drivers/baseband/acc100/rte_acc100_pmd.c > +++ b/drivers/baseband/acc100/rte_acc100_pmd.c > @@ -1304,6 +1304,11 @@ acc100_fcw_td_fill(const struct rte_bbdev_dec_op *op, struct acc100_fcw_td *fcw) > RTE_BBDEV_TURBO_HALF_ITERATION_EVEN); > } > > +/* Convert offset to harq index for harq_layout structure */ > +static inline uint32_t hq_index(uint32_t offset) > +{ > + return (offset >> ACC100_HARQ_OFFSET_SHIFT) & ACC100_HARQ_OFFSET_MASK; > +} > > static inline bool > is_acc100(struct acc100_queue *q) > @@ -1323,7 +1328,7 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw, > union acc100_harq_layout_data *harq_layout) > { > uint16_t harq_out_length, harq_in_length, ncb_p, k0_p, parity_offset; > - uint16_t harq_index; > + uint32_t harq_index; > uint32_t l; > bool harq_prun = false; > > @@ -1362,8 +1367,7 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw, > RTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION); > fcw->llr_pack_mode = check_bit(op->ldpc_dec.op_flags, > RTE_BBDEV_LDPC_LLR_COMPRESSION); > - harq_index = op->ldpc_dec.harq_combined_output.offset / > - ACC100_HARQ_OFFSET; > + harq_index = hq_index(op->ldpc_dec.harq_combined_output.offset); > #ifdef ACC100_EXT_MEM > /* Limit cases when HARQ pruning is valid */ > harq_prun = ((op->ldpc_dec.harq_combined_output.offset % > @@ -1443,12 +1447,6 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw, > } > } > > -/* Convert offset to harq index for harq_layout structure */ > -static inline uint32_t hq_index(uint32_t offset) > -{ > - return (offset >> ACC100_HARQ_OFFSET_SHIFT) & ACC100_HARQ_OFFSET_MASK; > -} > - > /* Fill in a frame control word for LDPC decoding for ACC101 */ > static inline void > acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw, > @@ -2132,12 +2130,11 @@ acc100_dma_desc_ld_update(struct rte_bbdev_dec_op *op, > struct rte_bbdev_dec_op *prev_op = desc->op_addr; > op->ldpc_dec.harq_combined_output.length = > prev_op->ldpc_dec.harq_combined_output.length; > - int16_t hq_idx = op->ldpc_dec.harq_combined_output.offset / > - ACC100_HARQ_OFFSET; > - int16_t prev_hq_idx = > - prev_op->ldpc_dec.harq_combined_output.offset > - / ACC100_HARQ_OFFSET; > - harq_layout[hq_idx].val = harq_layout[prev_hq_idx].val; > + uint32_t harq_idx = hq_index( > + op->ldpc_dec.harq_combined_output.offset); > + uint32_t prev_harq_idx = hq_index( > + prev_op->ldpc_dec.harq_combined_output.offset); > + harq_layout[harq_idx].val = harq_layout[prev_harq_idx].val; Don't mix declarations & code. Also, the coding rules has been updated some time ago, it is possible to go up to 100 characters [0] if it improves readability. > #ifndef ACC100_EXT_MEM > struct rte_bbdev_op_data ho = > op->ldpc_dec.harq_combined_output; > @@ -2969,10 +2966,9 @@ harq_loopback(struct acc100_queue *q, struct rte_bbdev_dec_op *op, > bool ddr_mem_in = check_bit(op->ldpc_dec.op_flags, > RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_IN_ENABLE); > union acc100_harq_layout_data *harq_layout = q->d->harq_layout; > - uint16_t harq_index = (ddr_mem_in ? > + uint32_t harq_index = hq_index(ddr_mem_in ? > op->ldpc_dec.harq_combined_input.offset : > - op->ldpc_dec.harq_combined_output.offset) > - / ACC100_HARQ_OFFSET; > + op->ldpc_dec.harq_combined_output.offset); > > uint16_t desc_idx = ((q->sw_ring_head + total_enqueued_cbs) > & q->sw_ring_wrap_mask); With above minor issues fixed: Reviewed-by: Maxime Coquelin Thanks, Maxime [0]: https://git.dpdk.org/dpdk/tree/doc/guides/contributing/coding_style.rst#n30