From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 59476A034C; Tue, 18 Aug 2020 04:47:10 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 0DD881C022; Tue, 18 Aug 2020 04:47:10 +0200 (CEST) Received: from mail.chinasoftinc.com (unknown [114.113.233.8]) by dpdk.org (Postfix) with ESMTP id ADFEA1C01B for ; Tue, 18 Aug 2020 04:47:04 +0200 (CEST) Received: from [192.168.1.199] (139.159.243.11) by INCCAS001.ito.icss (10.168.0.60) with Microsoft SMTP Server id 14.3.487.0; Tue, 18 Aug 2020 10:47:03 +0800 To: Jerin Jacob CC: "Wei Hu (Xavier)" , dpdk-dev , "Wei Hu (Xavier" , nd , Honnappa Nagarahalli , "Ruifeng Wang (Arm Technology China)" References: <20200817124703.58157-1-huwei013@chinasoftinc.com> From: "Wei Hu (Xavier)" Message-ID: <4c345469-6cc3-df6f-6760-d0a47bb59d6a@chinasoftinc.com> Date: Tue, 18 Aug 2020 10:47:02 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:68.0) Gecko/20100101 Thunderbird/68.11.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [139.159.243.11] Subject: Re: [dpdk-dev] [PATCH v2] lib/librte_eal: support SVE flag on ARM64 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi, Jerin Jacob On 2020/8/17 21:07, Jerin Jacob wrote: > On Mon, Aug 17, 2020 at 6:17 PM Wei Hu (Xavier) > wrote: >> >> From: "Wei Hu (Xavier)" >> >> SVE is the next-generation SIMD extension of the ARMv8-A AArch64 >> instruction set. >> The related marco definition can be found in linux kernel: >> arch/arm64/include/uapi/asm/hwcap.h >> >> This patch supports getting cpu SVE feature on ARM64 platform. >> >> Signed-off-by: Chengwen Feng >> Signed-off-by: Wei Hu (Xavier) > > Change the git commit like > > eal/arm64: update CPU flags OK, I will update it in V3. > > > > >> --- >> v1 -> v2: >> Adds more sve-related definition to rte_cpu_feature_table, >> sunch as SVE2, etc. >> --- >> lib/librte_eal/arm/include/rte_cpuflags_64.h | 1 + >> lib/librte_eal/arm/rte_cpuflags.c | 11 +++++++++++ >> 2 files changed, 12 insertions(+) >> >> diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h b/lib/librte_eal/arm/include/rte_cpuflags_64.h >> index 95cc01474..069844ddb 100644 >> --- a/lib/librte_eal/arm/include/rte_cpuflags_64.h >> +++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h >> @@ -22,6 +22,7 @@ enum rte_cpu_flag_t { >> RTE_CPUFLAG_SHA2, >> RTE_CPUFLAG_CRC32, >> RTE_CPUFLAG_ATOMICS, >> + RTE_CPUFLAG_SVE, > > Please intrdouce the flag for all newly added items as well. OK, I will update it in V3. > >> RTE_CPUFLAG_AARCH64, >> /* The last item */ >> RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */ >> diff --git a/lib/librte_eal/arm/rte_cpuflags.c b/lib/librte_eal/arm/rte_cpuflags.c >> index caf3dc83a..97a9fcfd4 100644 >> --- a/lib/librte_eal/arm/rte_cpuflags.c >> +++ b/lib/librte_eal/arm/rte_cpuflags.c >> @@ -95,6 +95,17 @@ const struct feature_entry rte_cpu_feature_table[] = { >> FEAT_DEF(SHA2, REG_HWCAP, 6) >> FEAT_DEF(CRC32, REG_HWCAP, 7) >> FEAT_DEF(ATOMICS, REG_HWCAP, 8) >> + FEAT_DEF(SVE, REG_HWCAP, 22) >> + FEAT_DEF(SVE2, REG_HWCAP2, 1) >> + FEAT_DEF(SVEAES, REG_HWCAP2, 2) >> + FEAT_DEF(SVEPMULL, REG_HWCAP2, 3) >> + FEAT_DEF(SVEBITPERM, REG_HWCAP2, 4) >> + FEAT_DEF(SVESHA3, REG_HWCAP2, 5) >> + FEAT_DEF(SVESM4, REG_HWCAP2, 6) > > Following stuff is missing > HWCAP2_FLAGM2 (1 << 7) > HWCAP2_FRINT (1 << 8) OK, I will update it in V3. Thanks, Xavier > >> + FEAT_DEF(SVEI8MM, REG_HWCAP2, 9) >> + FEAT_DEF(SVEF32MM, REG_HWCAP2, 10) >> + FEAT_DEF(SVEF64MM, REG_HWCAP2, 11) >> + FEAT_DEF(SVEBF16, REG_HWCAP2, 12) >> FEAT_DEF(AARCH64, REG_PLATFORM, 1) >> }; >> #endif /* RTE_ARCH */ >> -- >> 2.27.0 >>