From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr0-f175.google.com (mail-wr0-f175.google.com [209.85.128.175]) by dpdk.org (Postfix) with ESMTP id 41478FB1E for ; Mon, 27 Mar 2017 17:41:56 +0200 (CEST) Received: by mail-wr0-f175.google.com with SMTP id w43so49947661wrb.0 for ; Mon, 27 Mar 2017 08:41:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=XQpGcBrdHzATQeKMybAFPUhClMlIWDnxh+nKLB2Oxyw=; b=BpImI+iUVZNqU5iT3Yf/qzyePTft2I1P6J5nJSSXXC+CdcsX6Ob5MMpIZwTdI/44vb InbD3kSiy6slgqgO0Iov+ym2QfeFrh3JofauYyW5aQpf5Y/6X/qzVbEa92q5kCnarNHO 1Tb8sZcqAUHHEP7ZIRgHEEEuwfc8vISqQO6IxT7TFZU5f82hkO2x21bNA9EdlwlLEOvN z/hVcMBuR5+6xvOjsDaCpXgzdYzowJsx8aPoJbri+0A91OFVD3XBsME7KMStDAfFp4kY unfM15ELy3GMjPTCAwvKz9ogSlUAVLN4Fx/8LtgFjKgIYYDMiJ5G9JI+F47F7P85M/R6 MuTg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=XQpGcBrdHzATQeKMybAFPUhClMlIWDnxh+nKLB2Oxyw=; b=RRotk7uttxCMpRX+VbAhUMiy9R1rB+qRxLXGBuWlfw22er1yttknZtB3hPRhjgLi2n AEfCYfS0S4ABOUQwyem3LvODNKXGizRQy4H7Tuxll63GX5o8izHiGhsyVaCrlTcExUAb tEb2YurQYVEYieA6mMoptzgGQ0Fgqy8U6AJ3IdH3cKRXLYuDS56xZAkLTwZolzGeyxi4 RZ1qI+XWeNF1Rg1WMwXeZdJ+YCu4gF+pMqd9o/z49uwADaoWS6fe1KWKwr6Mu0E79wwW NgghFF6BIehGNqXHrWq7xYRvxnFeHLZScq1+T21fUdauwCxVUoZfmV5VqlJHjF/J7Iih 1Ldg== X-Gm-Message-State: AFeK/H24SLiSJVD8Hj1ZsCh8+DpOXEEC+rGKDk4lRrvnwZAbvzZxqf7u1Brpdg8YsDtSuR4n X-Received: by 10.223.161.220 with SMTP id v28mr9692760wrv.54.1490629310056; Mon, 27 Mar 2017 08:41:50 -0700 (PDT) Received: from bidouze.dev.6wind.com (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id t63sm1346050wme.16.2017.03.27.08.41.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 27 Mar 2017 08:41:49 -0700 (PDT) From: Gaetan Rivet To: dev@dpdk.org Cc: Adrien Mazarguil , Nelio Laranjeiro Date: Mon, 27 Mar 2017 17:41:37 +0200 Message-Id: <4def4d79857b1a72c1fceb686f7d89b649251c19.1490628627.git.gaetan.rivet@6wind.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: References: Subject: [dpdk-dev] [PATCH v2 1/1] net/mlx4: add port parameter X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 27 Mar 2017 15:41:56 -0000 Most ConnectX-3 adapters expose two physical ports on a single PCI bus address. Add a new port parameter allowing the user to choose either or both physical ports to be used by the application. This parameter is used as follows: Selecting only the second port: -w 00:00.0,port=1 Selecting both ports: -w 00:00.0,port=0,port=1 If no parameter is given, the default behavior is unchanged: all ports are probed. Signed-off-by: Gaetan Rivet --- doc/guides/nics/mlx4.rst | 6 +++ drivers/net/mlx4/Makefile | 1 + drivers/net/mlx4/mlx4.c | 104 ++++++++++++++++++++++++++++++++++++++++++++++ drivers/net/mlx4/mlx4.h | 6 +++ 4 files changed, 117 insertions(+) diff --git a/doc/guides/nics/mlx4.rst b/doc/guides/nics/mlx4.rst index 9a2e973..7992735 100644 --- a/doc/guides/nics/mlx4.rst +++ b/doc/guides/nics/mlx4.rst @@ -162,6 +162,12 @@ Run-time configuration - **ethtool** operations on related kernel interfaces also affect the PMD. +- ``port`` parameter [int] + + This parameter provides a physical port to probe and can be specified multiple + times for additional ports. All ports are probed by default if left + unspecified. + Kernel module parameters ~~~~~~~~~~~~~~~~~~~~~~~~ diff --git a/drivers/net/mlx4/Makefile b/drivers/net/mlx4/Makefile index 1d463f7..f0ee282 100644 --- a/drivers/net/mlx4/Makefile +++ b/drivers/net/mlx4/Makefile @@ -43,6 +43,7 @@ DEPDIRS-$(CONFIG_RTE_LIBRTE_MLX4_PMD) += lib/librte_ether DEPDIRS-$(CONFIG_RTE_LIBRTE_MLX4_PMD) += lib/librte_mbuf DEPDIRS-$(CONFIG_RTE_LIBRTE_MLX4_PMD) += lib/librte_eal DEPDIRS-$(CONFIG_RTE_LIBRTE_MLX4_PMD) += lib/librte_mempool +DEPDIRS-$(CONFIG_RTE_LIBRTE_MLX4_PMD) += lib/librte_kvargs # Basic CFLAGS. CFLAGS += -O3 diff --git a/drivers/net/mlx4/mlx4.c b/drivers/net/mlx4/mlx4.c index 35a680c..311e0b7 100644 --- a/drivers/net/mlx4/mlx4.c +++ b/drivers/net/mlx4/mlx4.c @@ -83,6 +83,7 @@ #include #include #include +#include /* Generated configuration header. */ #include "mlx4_autoconf.h" @@ -125,6 +126,16 @@ struct mlx4_secondary_data { rte_spinlock_t lock; /* Port configuration lock. */ } mlx4_secondary_data[RTE_MAX_ETHPORTS]; +struct mlx4_conf { + uint8_t active_ports; +}; + +/* Available parameters list. */ +const char *pmd_mlx4_init_params[] = { + MLX4_PMD_PORT_KVARG, + NULL, +}; + /** * Check if running as a secondary process. * @@ -5396,6 +5407,84 @@ priv_dev_interrupt_handler_install(struct priv *priv, struct rte_eth_dev *dev) } } +/** + * Verify and store value for device argument. + * + * @param[in] key + * Key argument to verify. + * @param[in] val + * Value associated with key. + * @param out + * User data. + * + * @return + * 0 on success, negative errno value on failure. + */ +static int +mlx4_arg_parse(const char *key, const char *val, void *out) +{ + struct mlx4_conf *conf = out; + unsigned long tmp; + + errno = 0; + tmp = strtoul(val, NULL, 0); + if (errno) { + WARN("%s: \"%s\" is not a valid integer", key, val); + return -errno; + } + if (strcmp(MLX4_PMD_PORT_KVARG, key) == 0) { + if (tmp >= MLX4_PMD_MAX_PHYS_PORTS) { + ERROR("invalid port index %lu (max: %u)", + tmp, MLX4_PMD_MAX_PHYS_PORTS - 1); + return -EINVAL; + } + conf->active_ports |= 1 << tmp; + } else { + WARN("%s: unknown parameter", key); + return -EINVAL; + } + return 0; +} + +/** + * Parse device parameters. + * + * @param devargs + * Device arguments structure. + * + * @return + * 0 on success, negative errno value on failure. + */ +static int +mlx4_args(struct rte_devargs *devargs, struct mlx4_conf *conf) +{ + struct rte_kvargs *kvlist; + unsigned int arg_count; + int ret = 0; + int i; + + if (devargs == NULL) + return 0; + kvlist = rte_kvargs_parse(devargs->args, pmd_mlx4_init_params); + if (kvlist == NULL) { + ERROR("failed to parse kvargs"); + return -EINVAL; + } + /* Process parameters. */ + for (i = 0; pmd_mlx4_init_params[i]; ++i) { + arg_count = rte_kvargs_count(kvlist, MLX4_PMD_PORT_KVARG); + while (arg_count-- > 0) { + ret = rte_kvargs_process(kvlist, MLX4_PMD_PORT_KVARG, + mlx4_arg_parse, conf); + if (ret != 0) + goto free_kvlist; + } + } +free_kvlist: + rte_kvargs_free(kvlist); + return ret; +} + static struct eth_driver mlx4_driver; /** @@ -5420,6 +5509,9 @@ mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) int err = 0; struct ibv_context *attr_ctx = NULL; struct ibv_device_attr device_attr; + struct mlx4_conf conf = { + .active_ports = 0, + }; unsigned int vf; int idx; int i; @@ -5490,6 +5582,15 @@ mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) goto error; INFO("%u port(s) detected", device_attr.phys_port_cnt); + if (mlx4_args(pci_dev->device.devargs, &conf)) { + ERROR("failed to process device arguments"); + goto error; + } + /* Use all ports when none are defined */ + if (conf.active_ports == 0) { + for (i = 0; i < MLX4_PMD_MAX_PHYS_PORTS; i++) + conf.active_ports |= 1 << i; + } for (i = 0; i < device_attr.phys_port_cnt; i++) { uint32_t port = i + 1; /* ports are indexed from one */ uint32_t test = (1 << i); @@ -5503,6 +5604,9 @@ mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) #endif /* HAVE_EXP_QUERY_DEVICE */ struct ether_addr mac; + /* If port is not active, skip. */ + if (!(conf.active_ports & (1 << i))) + continue; #ifdef HAVE_EXP_QUERY_DEVICE exp_device_attr.comp_mask = IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS; #ifdef RSS_SUPPORT diff --git a/drivers/net/mlx4/mlx4.h b/drivers/net/mlx4/mlx4.h index 877ed79..e9659eb 100644 --- a/drivers/net/mlx4/mlx4.h +++ b/drivers/net/mlx4/mlx4.h @@ -81,6 +81,9 @@ /* Request send completion once in every 64 sends, might be less. */ #define MLX4_PMD_TX_PER_COMP_REQ 64 +/* Maximum number of physical ports. */ +#define MLX4_PMD_MAX_PHYS_PORTS 2 + /* Maximum number of Scatter/Gather Elements per Work Request. */ #ifndef MLX4_PMD_SGE_WR_N #define MLX4_PMD_SGE_WR_N 4 @@ -113,6 +116,9 @@ /* Alarm timeout. */ #define MLX4_ALARM_TIMEOUT_US 100000 +/* Port parameter. */ +#define MLX4_PMD_PORT_KVARG "port" + enum { PCI_VENDOR_ID_MELLANOX = 0x15b3, }; -- 2.1.4