From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 764A1454EF; Tue, 25 Jun 2024 13:20:34 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6708A42F02; Tue, 25 Jun 2024 13:16:45 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) by mails.dpdk.org (Postfix) with ESMTP id A112E427A0 for ; Tue, 25 Jun 2024 13:16:06 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1719314166; x=1750850166; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=N47L2o0wlxkA/OnMP/RqNnRZc96y7dfwphc8J3goROc=; b=AJQsmU8mXvPEbTDEty4FRp50KRKF4AR9VU9wInwlMVddYBNVfqPe008A 5eQJIzrzuNC9VZ5gvHHGEWGQcJ39Cxu6AZ4FjtBYywZHogPIArIkMlOgE ieg33wHdFf2SncQNzjra1GQ6AyL2ZlWW2I2GWgg2NruN76s23iTifQdXd ZDE/H3ZZq8qvm/4yLTikq97LlHn+3g2ceoAwWrT/S+Iusqhkp1F9IFiZR SPhxzKXtjp1f5RcD5EaVF6ScBOjnm7KIj2pzRLW6iJ8NRqfDy7RLSCSqV i5Qv7TiPOQv5dmQoy2mAY4saPJ8aOpWgXoxlnRUiWBe5IV1AvraTX9Wkb Q==; X-CSE-ConnectionGUID: 6Nc33Qy2SKyOPDB/b34d8A== X-CSE-MsgGUID: 21YsTjhbQ4yh5u2pQ1OXpw== X-IronPort-AV: E=McAfee;i="6700,10204,11113"; a="16080181" X-IronPort-AV: E=Sophos;i="6.08,263,1712646000"; d="scan'208";a="16080181" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jun 2024 04:16:06 -0700 X-CSE-ConnectionGUID: GEJIYCIBSwSFvaRAQlMLyw== X-CSE-MsgGUID: YoqaqCldQJ22HzkBENOaRQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,263,1712646000"; d="scan'208";a="43719162" Received: from unknown (HELO silpixa00401119.ir.intel.com) ([10.55.129.167]) by orviesa009.jf.intel.com with ESMTP; 25 Jun 2024 04:16:06 -0700 From: Anatoly Burakov To: dev@dpdk.org Cc: Eric Joyner , bruce.richardson@intel.com, ian.stokes@intel.com Subject: [PATCH v3 041/129] net/ice/base: fix GCS descriptor field offsets Date: Tue, 25 Jun 2024 12:12:46 +0100 Message-ID: <500519f5b84052f94b5b9b94b785a639655fd7e2.1719313663.git.anatoly.burakov@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Eric Joyner Update the offsets, and remove the ICE_TX_GCS_DESC_ENA define since a non-0 value used for the ICE_TX_GCS_DESC_TYPE field will enable GCS offload; there is no dedicated bit to enable it anymore. Signed-off-by: Eric Joyner Signed-off-by: Ian Stokes --- drivers/net/ice/base/ice_lan_tx_rx.h | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h index d816df0ff6..39673e36f7 100644 --- a/drivers/net/ice/base/ice_lan_tx_rx.h +++ b/drivers/net/ice/base/ice_lan_tx_rx.h @@ -1074,10 +1074,9 @@ struct ice_tx_ctx_desc { __le64 qw1; }; -#define ICE_TX_GSC_DESC_START 0 /* 7 BITS */ -#define ICE_TX_GSC_DESC_OFFSET 7 /* 4 BITS */ -#define ICE_TX_GSC_DESC_TYPE 11 /* 2 BITS */ -#define ICE_TX_GSC_DESC_ENA 13 /* 1 BIT */ +#define ICE_TX_GCS_DESC_START 0 /* 8 BITS */ +#define ICE_TX_GCS_DESC_OFFSET 8 /* 4 BITS */ +#define ICE_TX_GCS_DESC_TYPE 12 /* 3 BITS */ #define ICE_TXD_CTX_QW1_DTYPE_S 0 #define ICE_TXD_CTX_QW1_DTYPE_M (0xFUL << ICE_TXD_CTX_QW1_DTYPE_S) -- 2.43.0