From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id 28251AD9C for ; Wed, 4 Feb 2015 03:36:25 +0100 (CET) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga103.fm.intel.com with ESMTP; 03 Feb 2015 18:29:48 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.09,516,1418112000"; d="scan'208";a="680536604" Received: from pgsmsx108.gar.corp.intel.com ([10.221.44.103]) by orsmga002.jf.intel.com with ESMTP; 03 Feb 2015 18:36:23 -0800 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by PGSMSX108.gar.corp.intel.com (10.221.44.103) with Microsoft SMTP Server (TLS) id 14.3.195.1; Wed, 4 Feb 2015 10:36:21 +0800 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.253]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.168]) with mapi id 14.03.0195.001; Wed, 4 Feb 2015 10:36:21 +0800 From: "Qiu, Michael" To: "Chen, Jing D" , "dev@dpdk.org" Thread-Topic: [PATCH 10/18] fm10k: add dev start/stop functions Thread-Index: AQHQPErQQhRals+9PEOY4AjzB/ysXA== Date: Wed, 4 Feb 2015 02:36:19 +0000 Message-ID: <533710CFB86FA344BFBF2D6802E60286CD4285@SHSMSX101.ccr.corp.intel.com> References: <1422594454-11045-1-git-send-email-jing.d.chen@intel.com> <1422594454-11045-11-git-send-email-jing.d.chen@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH 10/18] fm10k: add dev start/stop functions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 04 Feb 2015 02:36:27 -0000 On 1/30/2015 1:08 PM, Chen, Jing D wrote:=0A= > From: Jeff Shaw =0A= >=0A= > 1. Add function to initialize single RX queue.=0A= > 2. Add function to initialize single TX queue.=0A= > 3. Add fm10k_dev_start, fm10k_dev_stop and fm10k_dev_close=0A= > functions.=0A= >=0A= > Signed-off-by: Jeff Shaw =0A= > Signed-off-by: Chen Jing D(Mark) =0A= > ---=0A= > lib/librte_pmd_fm10k/fm10k_ethdev.c | 220 +++++++++++++++++++++++++++++= ++++++=0A= > 1 files changed, 220 insertions(+), 0 deletions(-)=0A= >=0A= > diff --git a/lib/librte_pmd_fm10k/fm10k_ethdev.c b/lib/librte_pmd_fm10k/f= m10k_ethdev.c=0A= > index b4b49cd..3cf5e25 100644=0A= > --- a/lib/librte_pmd_fm10k/fm10k_ethdev.c=0A= > +++ b/lib/librte_pmd_fm10k/fm10k_ethdev.c=0A= > @@ -49,6 +49,8 @@=0A= > #define CHARS_PER_UINT32 (sizeof(uint32_t))=0A= > #define BIT_MASK_PER_UINT32 ((1 << CHARS_PER_UINT32) - 1)=0A= > =0A= > +static void fm10k_close_mbx_service(struct fm10k_hw *hw);=0A= > +=0A= > static void=0A= > fm10k_mbx_initlock(struct fm10k_hw *hw)=0A= > {=0A= > @@ -268,6 +270,98 @@ fm10k_dev_configure(struct rte_eth_dev *dev)=0A= > }=0A= > =0A= > static int=0A= > +fm10k_dev_tx_init(struct rte_eth_dev *dev)=0A= > +{=0A= > + struct fm10k_hw *hw =3D FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private)= ;=0A= > + int i, ret;=0A= > + struct fm10k_tx_queue *txq;=0A= > + uint64_t base_addr;=0A= > + uint32_t size;=0A= > +=0A= > + /* Disable TXINT to avoid possible interrupt */=0A= > + for (i =3D 0; i < hw->mac.max_queues; i++)=0A= > + FM10K_WRITE_REG(hw, FM10K_TXINT(i),=0A= > + 3 << FM10K_TXINT_TIMER_SHIFT);=0A= > +=0A= > + /* Setup TX queue */=0A= > + for (i =3D 0; i < dev->data->nb_tx_queues; ++i) {=0A= > + txq =3D dev->data->tx_queues[i];=0A= > + base_addr =3D txq->hw_ring_phys_addr;=0A= > + size =3D txq->nb_desc * sizeof(struct fm10k_tx_desc);=0A= > +=0A= > + /* disable queue to avoid issues while updating state */=0A= > + ret =3D tx_queue_disable(hw, i);=0A= > + if (ret) {=0A= > + PMD_LOG(ERR, "failed to disable queue %d\n", i);=0A= > + return -1;=0A= > + }=0A= > +=0A= > + /* set location and size for descriptor ring */=0A= > + FM10K_WRITE_REG(hw, FM10K_TDBAL(i),=0A= > + base_addr & 0x00000000ffffffffULL);=0A= =0A= Here better to make a address mask here.=0A= =0A= > + FM10K_WRITE_REG(hw, FM10K_TDBAH(i),=0A= > + base_addr >> (CHAR_BIT * sizeof(uint32_t)));=0A= > + FM10K_WRITE_REG(hw, FM10K_TDLEN(i), size);=0A= > + }=0A= > + return 0;=0A= > +}=0A= > +=0A= > +static int=0A= > +fm10k_dev_rx_init(struct rte_eth_dev *dev)=0A= > +{=0A= > + struct fm10k_hw *hw =3D FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private)= ;=0A= > + int i, ret;=0A= > + struct fm10k_rx_queue *rxq;=0A= > + uint64_t base_addr;=0A= > + uint32_t size;=0A= > + uint32_t rxdctl =3D FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;=0A= > + uint16_t buf_size;=0A= > + struct rte_pktmbuf_pool_private *mbp_priv;=0A= > +=0A= > + /* Disable RXINT to avoid possible interrupt */=0A= > + for (i =3D 0; i < hw->mac.max_queues; i++)=0A= > + FM10K_WRITE_REG(hw, FM10K_RXINT(i),=0A= > + 3 << FM10K_RXINT_TIMER_SHIFT);=0A= > +=0A= > + /* Setup RX queues */=0A= > + for (i =3D 0; i < dev->data->nb_rx_queues; ++i) {=0A= > + rxq =3D dev->data->rx_queues[i];=0A= > + base_addr =3D rxq->hw_ring_phys_addr;=0A= > + size =3D rxq->nb_desc * sizeof(union fm10k_rx_desc);=0A= > +=0A= > + /* disable queue to avoid issues while updating state */=0A= > + ret =3D rx_queue_disable(hw, i);=0A= > + if (ret) {=0A= > + PMD_LOG(ERR, "failed to disable queue %d\n", i);=0A= > + return -1;=0A= > + }=0A= > +=0A= > + /* Setup the Base and Length of the Rx Descriptor Ring */=0A= > + FM10K_WRITE_REG(hw, FM10K_RDBAL(i),=0A= > + base_addr & 0x00000000ffffffffULL);=0A= =0A= Here better to make a address mask here.=0A= =0A= Thanks,=0A= Michael=0A= > + FM10K_WRITE_REG(hw, FM10K_RDBAH(i),=0A= > + base_addr >> (CHAR_BIT * sizeof(uint32_t)));=0A= > + FM10K_WRITE_REG(hw, FM10K_RDLEN(i), size);=0A= > +=0A= > + /* Configure the Rx buffer size for one buff without split */=0A= > + mbp_priv =3D rte_mempool_get_priv(rxq->mp);=0A= > + buf_size =3D (uint16_t) (mbp_priv->mbuf_data_room_size -=0A= > + RTE_PKTMBUF_HEADROOM);=0A= > + FM10K_WRITE_REG(hw, FM10K_SRRCTL(i),=0A= > + buf_size >> FM10K_SRRCTL_BSIZEPKT_SHIFT);=0A= > +=0A= > + /* Enable drop on empty, it's RO for VF */=0A= > + if (hw->mac.type =3D=3D fm10k_mac_pf && rxq->drop_en)=0A= > + rxdctl |=3D FM10K_RXDCTL_DROP_ON_EMPTY;=0A= > +=0A= > + FM10K_WRITE_REG(hw, FM10K_RXDCTL(i), rxdctl);=0A= > + FM10K_WRITE_FLUSH(hw);=0A= > + }=0A= > +=0A= > + return 0;=0A= > +}=0A= > +=0A= > +static int=0A= > fm10k_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)= =0A= > {=0A= > struct fm10k_hw *hw =3D FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private)= ;=0A= > @@ -371,6 +465,122 @@ fm10k_dev_tx_queue_stop(struct rte_eth_dev *dev, ui= nt16_t tx_queue_id)=0A= > return 0;=0A= > }=0A= > =0A= > +/* fls =3D find last set bit =3D 32 minus the number of leading zeros */= =0A= > +#ifndef fls=0A= > +#define fls(x) (((x) =3D=3D 0) ? 0 : (32 - __builtin_clz((x))))=0A= > +#endif=0A= > +#define BSIZEPKT_ROUNDUP ((1 << FM10K_SRRCTL_BSIZEPKT_SHIFT) - 1)=0A= > +static int=0A= > +fm10k_dev_start(struct rte_eth_dev *dev)=0A= > +{=0A= > + struct fm10k_hw *hw =3D FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private)= ;=0A= > + int i, diag;=0A= > +=0A= > + PMD_FUNC_TRACE();=0A= > +=0A= > + /* stop, init, then start the hw */=0A= > + diag =3D fm10k_stop_hw(hw);=0A= > + if (diag !=3D FM10K_SUCCESS) {=0A= > + PMD_LOG(ERR, "Hardware stop failed: %d", diag);=0A= > + return -EIO;=0A= > + }=0A= > +=0A= > + diag =3D fm10k_init_hw(hw);=0A= > + if (diag !=3D FM10K_SUCCESS) {=0A= > + PMD_LOG(ERR, "Hardware init failed: %d", diag);=0A= > + return -EIO;=0A= > + }=0A= > +=0A= > + diag =3D fm10k_start_hw(hw);=0A= > + if (diag !=3D FM10K_SUCCESS) {=0A= > + PMD_LOG(ERR, "Hardware start failed: %d", diag);=0A= > + return -EIO;=0A= > + }=0A= > +=0A= > + diag =3D fm10k_dev_tx_init(dev);=0A= > + if (diag) {=0A= > + PMD_LOG(ERR, "TX init failed: %d", diag);=0A= > + return diag;=0A= > + }=0A= > +=0A= > + diag =3D fm10k_dev_rx_init(dev);=0A= > + if (diag) {=0A= > + PMD_LOG(ERR, "RX init failed: %d", diag);=0A= > + return diag;=0A= > + }=0A= > +=0A= > + if (hw->mac.type =3D=3D fm10k_mac_pf) {=0A= > + /* Establish only VSI 0 as valid */=0A= > + FM10K_WRITE_REG(hw, FM10K_DGLORTMAP(0), FM10K_DGLORTMAP_ANY);=0A= > +=0A= > + /* Configure RSS bits used in RETA table */=0A= > + FM10K_WRITE_REG(hw, FM10K_DGLORTDEC(0),=0A= > + fls(dev->data->nb_rx_queues - 1) <<=0A= > + FM10K_DGLORTDEC_RSSLENGTH_SHIFT);=0A= > +=0A= > + /* Invalidate all other GLORT entries */=0A= > + for (i =3D 1; i < FM10K_DGLORT_COUNT; i++)=0A= > + FM10K_WRITE_REG(hw, FM10K_DGLORTMAP(i),=0A= > + FM10K_DGLORTMAP_NONE);=0A= > + }=0A= > +=0A= > + for (i =3D 0; i < dev->data->nb_rx_queues; i++) {=0A= > + struct fm10k_rx_queue *rxq;=0A= > + rxq =3D dev->data->rx_queues[i];=0A= > +=0A= > + if (rxq->rx_deferred_start)=0A= > + continue;=0A= > + diag =3D fm10k_dev_rx_queue_start(dev, i);=0A= > + if (diag !=3D 0) {=0A= > + int j;=0A= > + for (j =3D 0; j < i; ++j)=0A= > + rx_queue_clean(dev->data->rx_queues[j]);=0A= > + return diag;=0A= > + }=0A= > + }=0A= > +=0A= > + for (i =3D 0; i < dev->data->nb_tx_queues; i++) {=0A= > + struct fm10k_tx_queue *txq;=0A= > + txq =3D dev->data->tx_queues[i];=0A= > +=0A= > + if (txq->tx_deferred_start)=0A= > + continue;=0A= > + diag =3D fm10k_dev_tx_queue_start(dev, i);=0A= > + if (diag !=3D 0) {=0A= > + int j;=0A= > + for (j =3D 0; j < dev->data->nb_rx_queues; ++j)=0A= > + rx_queue_clean(dev->data->rx_queues[j]);=0A= > + return diag;=0A= > + }=0A= > + }=0A= > +=0A= > + return 0;=0A= > +}=0A= > +=0A= > +static void=0A= > +fm10k_dev_stop(struct rte_eth_dev *dev)=0A= > +{=0A= > + int i;=0A= > + PMD_FUNC_TRACE();=0A= > +=0A= > + for (i =3D 0; i < dev->data->nb_tx_queues; i++)=0A= > + fm10k_dev_tx_queue_stop(dev, i);=0A= > +=0A= > + for (i =3D 0; i < dev->data->nb_rx_queues; i++)=0A= > + fm10k_dev_rx_queue_stop(dev, i);=0A= > +}=0A= > +=0A= > +static void=0A= > +fm10k_dev_close(struct rte_eth_dev *dev)=0A= > +{=0A= > + struct fm10k_hw *hw =3D FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private)= ;=0A= > +=0A= > + /* Stop mailbox service first */=0A= > + fm10k_close_mbx_service(hw);=0A= > + fm10k_dev_stop(dev);=0A= > + fm10k_stop_hw(hw);=0A= > +}=0A= > +=0A= > static int=0A= > fm10k_link_update(struct rte_eth_dev *dev,=0A= > __rte_unused int wait_to_complete)=0A= > @@ -977,8 +1187,18 @@ fm10k_setup_mbx_service(struct fm10k_hw *hw)=0A= > return hw->mbx.ops.connect(hw, &hw->mbx);=0A= > }=0A= > =0A= > +static void=0A= > +fm10k_close_mbx_service(struct fm10k_hw *hw)=0A= > +{=0A= > + /* Disconnect from SM for PF device or PF for VF device */=0A= > + hw->mbx.ops.disconnect(hw, &hw->mbx);=0A= > +}=0A= > +=0A= > static struct eth_dev_ops fm10k_eth_dev_ops =3D {=0A= > .dev_configure =3D fm10k_dev_configure,=0A= > + .dev_start =3D fm10k_dev_start,=0A= > + .dev_stop =3D fm10k_dev_stop,=0A= > + .dev_close =3D fm10k_dev_close,=0A= > .link_update =3D fm10k_link_update,=0A= > .stats_get =3D fm10k_stats_get,=0A= > .stats_reset =3D fm10k_stats_reset,=0A= =0A=