From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 50A8DA04BC; Thu, 8 Oct 2020 11:41:42 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 399C61BC9B; Thu, 8 Oct 2020 11:41:41 +0200 (CEST) Received: from out5-smtp.messagingengine.com (out5-smtp.messagingengine.com [66.111.4.29]) by dpdk.org (Postfix) with ESMTP id 607061BC99 for ; Thu, 8 Oct 2020 11:41:40 +0200 (CEST) Received: from compute2.internal (compute2.nyi.internal [10.202.2.42]) by mailout.nyi.internal (Postfix) with ESMTP id 07EF75C00B9; Thu, 8 Oct 2020 05:41:37 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute2.internal (MEProxy); Thu, 08 Oct 2020 05:41:37 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s=fm2; bh= cBChY9bRxGbkSH+Kuc2CPEixEaYp9nknpjPPG4H8C7g=; b=m0Nj+C8WnlPlKF/b 8/m/pcXLmqBka014nyYnZ87ZgpTz7JJ9aqVDkJD7ILPmZJKcP/wNARRWmKe1xJD1 xW8qPB8Kb27fFphfDDDB4jPR9O3JoXF+LYM+ZJ6968OhNavH+Fz0ErC8KsUxeR7o fE225obaZvycLxEUtgGL+dk24th2GU/Jc3nUqB7AGsfdH8ftN41FHeMPvqD6odBV iXRoQxBM3zwaJrPI9z5ek7QuVcBb6BSQWZJ4Lt4K0BKD24upn/BuIBeETXkZmd0g 3cSzm+l4aNtpdryfQABhJmcdXUciIuXPGCQOJp6wSa7Sh1QV22FJ/ya/hKV2cKrC 5wqi8w== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm1; bh=cBChY9bRxGbkSH+Kuc2CPEixEaYp9nknpjPPG4H8C 7g=; b=gkXsLUmJR7p+hS4Clrc6W7aEABN2AQOYrPlXf10mEQVvs15Dvn+0M87a2 KNouPnkFGLBx+NgCyR+xJD+q92VR99XCegXJk/8G2+3MSpVjTfnvRZL6XvZXj5pt vsN/Bx1U9Tm1IJw8ebcyxsqmT7+xSr5z8pMNfv1Ajul3DmFDOzOOVVCB68aqojLr iBSK7JE9zwFd1YKGMcSyQ0ZFv+qKCIFjArQArmzVJq0RBlf7Pf5fjVHte7kYe4Mc dED7cwkvwyMVLS3WGyvhbJ6DJtzta5fheuSZNLrvBmB2B8o9nBMorm56tXZm3/DT eWOQrWEAM+xTzdnVOIeuTSrVE6UFw== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedujedrgeekgddvtdcutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefhvffufffkjghfggfgtgesthfuredttddtvdenucfhrhhomhepvfhhohhmrghs ucfoohhnjhgrlhhonhcuoehthhhomhgrshesmhhonhhjrghlohhnrdhnvghtqeenucggtf frrghtthgvrhhnpeffvdffjeeuteelfeeileduudeugfetjeelveefkeejfeeigeehteff vdekfeegudenucffohhmrghinhepughpughkrdhorhhgnecukfhppeejjedrudefgedrvd dtfedrudekgeenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhr ohhmpehthhhomhgrshesmhhonhhjrghlohhnrdhnvght X-ME-Proxy: Received: from xps.localnet (184.203.134.77.rev.sfr.net [77.134.203.184]) by mail.messagingengine.com (Postfix) with ESMTPA id 3B90A3280060; Thu, 8 Oct 2020 05:41:35 -0400 (EDT) From: Thomas Monjalon To: Liang Ma Cc: dev@dpdk.org, David Hunt , Stephen Hemminger , "Ananyev, Konstantin" , Anatoly Burakov , Honnappa Nagarahalli , "Ruifeng Wang (Arm Technology China)" , David Christensen , Jerin Jacob Date: Thu, 08 Oct 2020 11:41:34 +0200 Message-ID: <5469174.aIdF1LcEv1@thomas> In-Reply-To: References: <1599214740-3927-1-git-send-email-liang.j.ma@intel.com> <16022545.g3EcnA0i2J@thomas> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Subject: Re: [dpdk-dev] [PATCH v4 02/10] eal: add power management intrinsics X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" 08/10/2020 10:44, Jerin Jacob: > On Thu, Oct 8, 2020 at 2:04 PM Thomas Monjalon wrote: > > > > > Add two new power management intrinsics, and provide an implementation > > > in eal/x86 based on UMONITOR/UMWAIT instructions. The instructions > > > are implemented as raw byte opcodes because there is not yet widespread > > > compiler support for these instructions. > > > > > > The power management instructions provide an architecture-specific > > > function to either wait until a specified TSC timestamp is reached, or > > > optionally wait until either a TSC timestamp is reached or a memory > > > location is written to. The monitor function also provides an optional > > > comparison, to avoid sleeping when the expected write has already > > > happened, and no more writes are expected. > > > > > > For more details, Please reference Intel SDM Volume 2. > > > > I really would like to see feedbacks from other arch maintainers. > > Unfortunately they were not Cc'ed. > > Shared the feedback from the arm64 perspective here. Yet to get a reply on this. > http://mails.dpdk.org/archives/dev/2020-September/181646.html This comment was sent on September 18. Later this v4 was sent without replying to the comments. This is blocking the series. I am considering this feature as low priority. > > Also please mark the new functions as experimental.