From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 29510A0505; Fri, 6 May 2022 04:23:41 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C1C704014F; Fri, 6 May 2022 04:23:40 +0200 (CEST) Received: from szxga01-in.huawei.com (szxga01-in.huawei.com [45.249.212.187]) by mails.dpdk.org (Postfix) with ESMTP id DAFAD40042 for ; Fri, 6 May 2022 04:23:38 +0200 (CEST) Received: from dggpeml500024.china.huawei.com (unknown [172.30.72.53]) by szxga01-in.huawei.com (SkyGuard) with ESMTP id 4KvZ9Y5CrCzhYnG; Fri, 6 May 2022 10:23:13 +0800 (CST) Received: from [127.0.0.1] (10.67.100.224) by dggpeml500024.china.huawei.com (7.185.36.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Fri, 6 May 2022 10:23:36 +0800 Subject: Re: [PATCH 1/2] config/arm: add SVE control flag To: Rahul Bhansali , , Ruifeng Wang , Jan Viktorin , Bruce Richardson CC: References: <20220505142744.1423344-1-rbhansali@marvell.com> From: fengchengwen Message-ID: <55252843-81d3-62a6-9f0a-94d09930c5a1@huawei.com> Date: Fri, 6 May 2022 10:23:36 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.11.0 MIME-Version: 1.0 In-Reply-To: <20220505142744.1423344-1-rbhansali@marvell.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.67.100.224] X-ClientProxiedBy: dggems702-chm.china.huawei.com (10.3.19.179) To dggpeml500024.china.huawei.com (7.185.36.10) X-CFilter-Loop: Reflected X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On 2022/5/5 22:27, Rahul Bhansali wrote: > This add the control flag for SVE to enable or disable > RTE_HAS_SVE_ACLE macro in the build. > > Signed-off-by: Rahul Bhansali > --- > config/arm/meson.build | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/config/arm/meson.build b/config/arm/meson.build > index 8aead74086..dafb342cc6 100644 > --- a/config/arm/meson.build > +++ b/config/arm/meson.build > @@ -603,7 +603,8 @@ if (cc.get_define('__ARM_NEON', args: machine_args) != '' or > compile_time_cpuflags += ['RTE_CPUFLAG_NEON'] > endif > > -if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != '' > +if (cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != '' and > + soc_config.get('sve', true)) The march_features already contain the flag. If the cpu support 'sve' then it could declare it in march_features, please refer Kunpeng 930: '0xd02': { 'march': 'armv8.2-a', 'march_features': ['crypto', 'sve'], 'flags': [ ['RTE_MACHINE', '"Kunpeng 930"'], ['RTE_ARM_FEATURE_ATOMICS', true], ['RTE_MAX_LCORE', 1280], ['RTE_MAX_NUMA_NODES', 16] ] } > compile_time_cpuflags += ['RTE_CPUFLAG_SVE'] > if (cc.check_header('arm_sve.h')) > dpdk_conf.set('RTE_HAS_SVE_ACLE', 1) >