From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-000f0801.pphosted.com (mx0a-000f0801.pphosted.com [67.231.144.122]) by dpdk.org (Postfix) with ESMTP id 5EC6137A4 for ; Tue, 3 Nov 2015 16:57:23 +0100 (CET) Received: from pps.filterd (m0000542.ppops.net [127.0.0.1]) by mx0a-000f0801.pphosted.com (8.15.0.59/8.15.0.59) with SMTP id tA3FcHfr024951 for ; Tue, 3 Nov 2015 07:57:22 -0800 Received: from brmwp-exmb11.corp.brocade.com ([208.47.132.227]) by mx0a-000f0801.pphosted.com with ESMTP id 1xxyr2r1pv-1 (version=TLSv1/SSLv3 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 03 Nov 2015 07:57:22 -0800 Received: from EMEAWP-EXMB12.corp.brocade.com (172.29.11.86) by BRMWP-EXMB11.corp.brocade.com (172.16.59.77) with Microsoft SMTP Server (TLS) id 15.0.1104.5; Tue, 3 Nov 2015 08:57:20 -0700 Received: from [10.252.136.14] (10.252.136.14) by EMEAWP-EXMB12.corp.brocade.com (172.29.11.86) with Microsoft SMTP Server (TLS) id 15.0.1104.5; Tue, 3 Nov 2015 16:57:17 +0100 Message-ID: <5638D959.2050908@brocade.com> Date: Tue, 3 Nov 2015 15:57:13 +0000 From: simon barber User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Icedove/31.8.0 MIME-Version: 1.0 To: References: <1446565921-18088-1-git-send-email-jerin.jacob@caviumnetworks.com> In-Reply-To: <1446565921-18088-1-git-send-email-jerin.jacob@caviumnetworks.com> Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.252.136.14] X-ClientProxiedBy: hq1wp-excas12.corp.brocade.com (10.70.38.22) To EMEAWP-EXMB12.corp.brocade.com (172.29.11.86) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:5.15.21, 1.0.33, 0.0.0000 definitions=2015-11-03_09:2015-11-03,2015-11-03,1970-01-01 signatures=0 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 spamscore=0 suspectscore=3 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=7.0.1-1508030000 definitions=main-1511030264 Subject: Re: [dpdk-dev] [RFC ][PATCH] Introduce RTE_ARCH_STRONGLY_ORDERED_MEM_OPS configuration parameter X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 03 Nov 2015 15:57:23 -0000 Do we need to have all these #ifdef, it looks messy, can you not define a macro that is defined based upon RTE_ARCH_STRONGLY_ORDERED_MEM_OP /Simon On 11/03/2015 03:52 PM, Jerin Jacob wrote: > rte_ring implementation needs explicit memory barrier > in weakly ordered architecture like ARM unlike > strongly ordered architecture like X86 > > Introducing RTE_ARCH_STRONGLY_ORDERED_MEM_OPS > configuration to abstract such dependency so that other > weakly ordered architectures can reuse this infrastructure. > > Signed-off-by: Jerin Jacob > --- > config/common_bsdapp | 5 +++++ > config/common_linuxapp | 5 +++++ > config/defconfig_arm64-armv8a-linuxapp-gcc | 1 + > config/defconfig_arm64-thunderx-linuxapp-gcc | 1 + > lib/librte_ring/rte_ring.h | 20 ++++++++++++++++++++ > 5 files changed, 32 insertions(+) > > diff --git a/config/common_bsdapp b/config/common_bsdapp > index b37dcf4..c8d1f63 100644 > --- a/config/common_bsdapp > +++ b/config/common_bsdapp > @@ -79,6 +79,11 @@ CONFIG_RTE_FORCE_INTRINSICS=n > CONFIG_RTE_ARCH_STRICT_ALIGN=n > > # > +# Machine has strongly-ordered memory operations on normal memory like x86 > +# > +CONFIG_RTE_ARCH_STRONGLY_ORDERED_MEM_OPS=y > + > +# > # Compile to share library > # > CONFIG_RTE_BUILD_SHARED_LIB=n > diff --git a/config/common_linuxapp b/config/common_linuxapp > index 0de43d5..d040a74 100644 > --- a/config/common_linuxapp > +++ b/config/common_linuxapp > @@ -79,6 +79,11 @@ CONFIG_RTE_FORCE_INTRINSICS=n > CONFIG_RTE_ARCH_STRICT_ALIGN=n > > # > +# Machine has strongly-ordered memory operations on normal memory like x86 > +# > +CONFIG_RTE_ARCH_STRONGLY_ORDERED_MEM_OPS=y > + > +# > # Compile to share library > # > CONFIG_RTE_BUILD_SHARED_LIB=n > diff --git a/config/defconfig_arm64-armv8a-linuxapp-gcc b/config/defconfig_arm64-armv8a-linuxapp-gcc > index 6ea38a5..5289152 100644 > --- a/config/defconfig_arm64-armv8a-linuxapp-gcc > +++ b/config/defconfig_arm64-armv8a-linuxapp-gcc > @@ -37,6 +37,7 @@ CONFIG_RTE_ARCH="arm64" > CONFIG_RTE_ARCH_ARM64=y > CONFIG_RTE_ARCH_64=y > CONFIG_RTE_ARCH_ARM_NEON=y > +CONFIG_RTE_ARCH_STRONGLY_ORDERED_MEM_OPS=n > > CONFIG_RTE_FORCE_INTRINSICS=y > > diff --git a/config/defconfig_arm64-thunderx-linuxapp-gcc b/config/defconfig_arm64-thunderx-linuxapp-gcc > index e8fccc7..79fa9e6 100644 > --- a/config/defconfig_arm64-thunderx-linuxapp-gcc > +++ b/config/defconfig_arm64-thunderx-linuxapp-gcc > @@ -37,6 +37,7 @@ CONFIG_RTE_ARCH="arm64" > CONFIG_RTE_ARCH_ARM64=y > CONFIG_RTE_ARCH_64=y > CONFIG_RTE_ARCH_ARM_NEON=y > +CONFIG_RTE_ARCH_STRONGLY_ORDERED_MEM_OPS=n > > CONFIG_RTE_FORCE_INTRINSICS=y > > diff --git a/lib/librte_ring/rte_ring.h b/lib/librte_ring/rte_ring.h > index af68888..1ccd186 100644 > --- a/lib/librte_ring/rte_ring.h > +++ b/lib/librte_ring/rte_ring.h > @@ -457,7 +457,12 @@ __rte_ring_mp_do_enqueue(struct rte_ring *r, void * const *obj_table, > > /* write entries in ring */ > ENQUEUE_PTRS(); > + > +#ifdef RTE_ARCH_STRONGLY_ORDERED_MEM_OPS > rte_compiler_barrier(); > +#else > + rte_wmb(); > +#endif > > /* if we exceed the watermark */ > if (unlikely(((mask + 1) - free_entries + n) > r->prod.watermark)) { > @@ -552,7 +557,12 @@ __rte_ring_sp_do_enqueue(struct rte_ring *r, void * const *obj_table, > > /* write entries in ring */ > ENQUEUE_PTRS(); > + > +#ifdef RTE_ARCH_STRONGLY_ORDERED_MEM_OPS > rte_compiler_barrier(); > +#else > + rte_wmb(); > +#endif > > /* if we exceed the watermark */ > if (unlikely(((mask + 1) - free_entries + n) > r->prod.watermark)) { > @@ -643,7 +653,12 @@ __rte_ring_mc_do_dequeue(struct rte_ring *r, void **obj_table, > > /* copy in table */ > DEQUEUE_PTRS(); > + > +#ifdef RTE_ARCH_STRONGLY_ORDERED_MEM_OPS > rte_compiler_barrier(); > +#else > + rte_rmb(); > +#endif > > /* > * If there are other dequeues in progress that preceded us, > @@ -727,7 +742,12 @@ __rte_ring_sc_do_dequeue(struct rte_ring *r, void **obj_table, > > /* copy in table */ > DEQUEUE_PTRS(); > + > +#ifdef RTE_ARCH_STRONGLY_ORDERED_MEM_OPS > rte_compiler_barrier(); > +#else > + rte_rmb(); > +#endif > > __RING_STAT_ADD(r, deq_success, n); > r->cons.tail = cons_next;