From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 869138DA1 for ; Tue, 12 Jan 2016 09:39:38 +0100 (CET) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga101.fm.intel.com with ESMTP; 12 Jan 2016 00:39:38 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,556,1444719600"; d="scan'208";a="858744032" Received: from shwdeisgchi083.ccr.corp.intel.com (HELO [10.239.67.119]) ([10.239.67.119]) by orsmga001.jf.intel.com with ESMTP; 12 Jan 2016 00:39:35 -0800 To: Pavel Fedin , dev@dpdk.org References: <1446748276-132087-1-git-send-email-jianfeng.tan@intel.com> <1452426182-86851-1-git-send-email-jianfeng.tan@intel.com> <1452426182-86851-5-git-send-email-jianfeng.tan@intel.com> <009b01d14d0d$47c85540$d758ffc0$@samsung.com> From: "Tan, Jianfeng" Message-ID: <5694BBC6.3090500@intel.com> Date: Tue, 12 Jan 2016 16:39:34 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.3; WOW64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 MIME-Version: 1.0 In-Reply-To: <009b01d14d0d$47c85540$d758ffc0$@samsung.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Cc: nakajima.yoshihiro@lab.ntt.co.jp, mst@redhat.com, ann.zhuangyanying@huawei.com Subject: Re: [dpdk-dev] [PATCH 4/4] virtio/vdev: add a new vdev named eth_cvio X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 12 Jan 2016 08:39:38 -0000 Hi Fedin, On 1/12/2016 3:45 PM, Pavel Fedin wrote: > Hello! > > See inline > >> ... >> } >> >> + struct rte_mbuf *m = NULL; >> + if (dev->dev_type == RTE_ETH_DEV_PCI) >> + vq->offset = (uintptr_t)&m->buf_addr; >> +#ifdef RTE_VIRTIO_VDEV >> + else { >> + vq->offset = (uintptr_t)&m->buf_physaddr; > Not sure, but shouldn't these be swapped? Originally, for PCI devices, we used buf_physaddr. Oops, seems that you are right. I'm trying to figure out why I can rx/tx pkts using the wrong version. >> #define VIRTIO_READ_REG_1(hw, reg) \ >> - (hw->io_base != VIRTIO_VDEV_IO_BASE) ? \ >> + ((hw->io_base != VIRTIO_VDEV_IO_BASE) ? \ >> inb((VIRTIO_PCI_REG_ADDR((hw), (reg)))) \ >> - :virtio_ioport_read(hw, reg) >> + :virtio_ioport_read(hw, reg)) >> #define VIRTIO_WRITE_REG_1(hw, reg, value) \ >> - (hw->io_base != VIRTIO_VDEV_IO_BASE) ? \ >> + ((hw->io_base != VIRTIO_VDEV_IO_BASE) ? \ >> outb_p((unsigned char)(value), (VIRTIO_PCI_REG_ADDR((hw), (reg)))) \ >> - :virtio_ioport_write(hw, reg, value) >> + :virtio_ioport_write(hw, reg, value)) >> >> #define VIRTIO_READ_REG_2(hw, reg) \ >> - (hw->io_base != VIRTIO_VDEV_IO_BASE) ? \ >> + ((hw->io_base != VIRTIO_VDEV_IO_BASE) ? \ >> inw((VIRTIO_PCI_REG_ADDR((hw), (reg)))) \ >> - :virtio_ioport_read(hw, reg) >> + :virtio_ioport_read(hw, reg)) >> #define VIRTIO_WRITE_REG_2(hw, reg, value) \ >> - (hw->io_base != VIRTIO_VDEV_IO_BASE) ? \ >> + ((hw->io_base != VIRTIO_VDEV_IO_BASE) ? \ >> outw_p((unsigned short)(value), (VIRTIO_PCI_REG_ADDR((hw), (reg)))) \ >> - :virtio_ioport_write(hw, reg, value) >> + :virtio_ioport_write(hw, reg, value)) >> >> #define VIRTIO_READ_REG_4(hw, reg) \ >> - (hw->io_base != VIRTIO_VDEV_IO_BASE) ? \ >> + ((hw->io_base != VIRTIO_VDEV_IO_BASE) ? \ >> inl((VIRTIO_PCI_REG_ADDR((hw), (reg)))) \ >> - :virtio_ioport_read(hw, reg) >> + :virtio_ioport_read(hw, reg)) >> #define VIRTIO_WRITE_REG_4(hw, reg, value) \ >> - (hw->io_base != VIRTIO_VDEV_IO_BASE) ? \ >> + ((hw->io_base != VIRTIO_VDEV_IO_BASE) ? \ >> outl_p((unsigned int)(value), (VIRTIO_PCI_REG_ADDR((hw), (reg)))) \ >> - :virtio_ioport_write(hw, reg, value) >> + :virtio_ioport_write(hw, reg, value)) > These bracket fixups should be squashed into #3 > I'll rewrite this into function pointers according to Yuanhan's patch for virtio 1.0. Thanks, Jianfeng