From: fengchengwen <fengchengwen@huawei.com>
To: Stephen Hemminger <stephen@networkplumber.org>
Cc: <thomas@monjalon.net>, <dev@dpdk.org>,
<aman.deep.singh@intel.com>, <liuyonglong@huawei.com>,
<yangxingui@huawei.com>, <lihuisong@huawei.com>
Subject: Re: [PATCH v3] app/testpmd: support specify TCs when DCB forward
Date: Fri, 7 Nov 2025 08:57:31 +0800 [thread overview]
Message-ID: <5885fb7e-9aed-49ca-b035-207009057279@huawei.com> (raw)
In-Reply-To: <20251106112447.7b13d440@phoenix>
On 11/7/2025 3:24 AM, Stephen Hemminger wrote:
> On Thu, 6 Nov 2025 20:49:59 +0800
> Chengwen Feng <fengchengwen@huawei.com> wrote:
>
>> +static void
>> +dcb_forward_tc_update_dcb_info(struct rte_eth_dcb_info *org_dcb_info)
>> +{
>> + struct rte_eth_dcb_info dcb_info = {0};
>> + uint32_t i, vmdq_idx;
>> + uint32_t tc = 0;
>> +
>> + if (dcb_fwd_tc_mask == DEFAULT_DCB_FWD_TC_MASK)
>> + return;
>> +
>> + /*
>> + * Use compress scheme to update dcb-info.
>> + * E.g. If org_dcb_info->nb_tcs is 4 and dcb_fwd_tc_mask is 0x8, it
>> + * means only enable TC3, then the new dcb-info's nb_tcs is set to
>> + * 1, and also move corresponding tc_rxq and tc_txq info to new
>> + * index.
>> + */
>> + for (i = 0; i < org_dcb_info->nb_tcs; i++) {
>> + if (!(dcb_fwd_tc_mask & (1u << i)))
>> + continue;
>> + for (vmdq_idx = 0; vmdq_idx < RTE_ETH_MAX_VMDQ_POOL; vmdq_idx++) {
>> + dcb_info.tc_queue.tc_rxq[vmdq_idx][tc].base =
>> + org_dcb_info->tc_queue.tc_rxq[vmdq_idx][i].base;
>> + dcb_info.tc_queue.tc_rxq[vmdq_idx][tc].nb_queue =
>> + org_dcb_info->tc_queue.tc_rxq[vmdq_idx][i].nb_queue;
>> + dcb_info.tc_queue.tc_txq[vmdq_idx][tc].base =
>> + org_dcb_info->tc_queue.tc_txq[vmdq_idx][i].base;
>> + dcb_info.tc_queue.tc_txq[vmdq_idx][tc].nb_queue =
>> + org_dcb_info->tc_queue.tc_txq[vmdq_idx][i].nb_queue;
>> + }
>> + tc++;
>> + }
>> + dcb_info.nb_tcs = tc;
>> + memcpy(org_dcb_info, &dcb_info, sizeof(struct rte_eth_dcb_info));
>
> Prefer direct structure assignment over memcpy() here.
> *org_dcb_info = dcb_info;
>
> This makes sure types are the same, and compiler generates same code.
Thanks Stephen, the V4 already sent to fix it.
next prev parent reply other threads:[~2025-11-07 0:57 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-04 4:09 [PATCH 0/3] testpmd support stop specify lcore Chengwen Feng
2025-11-04 4:09 ` [PATCH 1/3] app/testpmd: fix invalid txp when setup DCB forward Chengwen Feng
2025-11-04 4:09 ` [PATCH 2/3] app/testpmd: fix wrong Rx queues " Chengwen Feng
2025-11-04 4:09 ` [PATCH 3/3] app/testpmd: support stop specify lcore Chengwen Feng
2025-11-05 0:21 ` [PATCH 0/3] testpmd " Stephen Hemminger
2025-11-05 0:43 ` fengchengwen
2025-11-05 9:47 ` [PATCH v2 0/3] testpmd support pause/resume specify lcore's fwd Chengwen Feng
2025-11-05 9:47 ` [PATCH v2 1/3] app/testpmd: fix invalid txp when setup DCB forward Chengwen Feng
2025-11-05 9:47 ` [PATCH v2 2/3] app/testpmd: fix wrong Rx queues " Chengwen Feng
2025-11-05 9:47 ` [PATCH v2 3/3] app/testpmd: support pause/resume specify lcore Chengwen Feng
2025-11-05 18:59 ` [PATCH v2 0/3] testpmd support pause/resume specify lcore's fwd Stephen Hemminger
2025-11-06 0:34 ` fengchengwen
2025-11-06 12:49 ` [PATCH v3] app/testpmd: support specify TCs when DCB forward Chengwen Feng
2025-11-06 19:24 ` Stephen Hemminger
2025-11-07 0:57 ` fengchengwen [this message]
2025-11-07 0:53 ` [PATCH v4] " Chengwen Feng
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