From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 83737A00E6 for ; Thu, 8 Aug 2019 10:53:11 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id EAC2B2B87; Thu, 8 Aug 2019 10:53:10 +0200 (CEST) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 4BEB82904 for ; Thu, 8 Aug 2019 10:53:08 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Aug 2019 01:53:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,360,1559545200"; d="scan'208";a="168919022" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by orsmga008.jf.intel.com with ESMTP; 08 Aug 2019 01:53:07 -0700 Received: from FMSMSX109.amr.corp.intel.com (10.18.116.9) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 8 Aug 2019 01:53:07 -0700 Received: from shsmsx108.ccr.corp.intel.com (10.239.4.97) by fmsmsx109.amr.corp.intel.com (10.18.116.9) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 8 Aug 2019 01:53:06 -0700 Received: from shsmsx105.ccr.corp.intel.com ([169.254.11.15]) by SHSMSX108.ccr.corp.intel.com ([169.254.8.163]) with mapi id 14.03.0439.000; Thu, 8 Aug 2019 16:53:04 +0800 From: "Pei, Andy" To: "Xu, Rosen" , "dev@dpdk.org" CC: "Yigit, Ferruh" , "Zhang, Tianfei" , "Lomartire, David" , "Zhang, Qi Z" , "Ye, Xiaolong" Thread-Topic: [PATCH v3 13/13] net/ipn3ke: add FPGA network side port MTU configuration Thread-Index: AQHVTcW/A1P6WqZl5kOf3RsJ39Lz3abw8WCw Date: Thu, 8 Aug 2019 08:53:03 +0000 Message-ID: <5941F446C088714A85408FA3132CFCBB0105D2F8@SHSMSX105.ccr.corp.intel.com> References: <1564556752-19257-2-git-send-email-rosen.xu@intel.com> <1565253974-183591-1-git-send-email-rosen.xu@intel.com> <1565253974-183591-14-git-send-email-rosen.xu@intel.com> In-Reply-To: <1565253974-183591-14-git-send-email-rosen.xu@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v3 13/13] net/ipn3ke: add FPGA network side port MTU configuration X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch set both line side and nic side MTU when Hardware init, and init= to IPN3KE_MAC_FRAME_SIZE_MAX. -----Original Message----- From: Xu, Rosen=20 Sent: Thursday, August 8, 2019 4:46 PM To: dev@dpdk.org Cc: Yigit, Ferruh ; Zhang, Tianfei ; Xu, Rosen ; Pei, Andy ; = Lomartire, David ; Zhang, Qi Z ; Ye, Xiaolong Subject: [PATCH v3 13/13] net/ipn3ke: add FPGA network side port MTU config= uration Add FPGA network side port MTU configuration in initialization. Signed-off-by: Rosen Xu --- drivers/net/ipn3ke/ipn3ke_ethdev.c | 8 ++++++ drivers/net/ipn3ke/ipn3ke_= ethdev.h | 55 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 63 insertions(+) diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c b/drivers/net/ipn3ke/ipn3ke= _ethdev.c index 363a5f1..7e7fa25 100644 --- a/drivers/net/ipn3ke/ipn3ke_ethdev.c +++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c @@ -292,6 +292,10 @@ =20 /* Clear line RX statistics counters */ ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 0); + + /* set mtu to max */ + ipn3ke_10G_mtu_setup(hw, i, 0); + ipn3ke_10G_mtu_setup(hw, i, 1); } } else if (hw->retimer.mac_type =3D=3D IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) { @@ -308,6 +312,10 @@ =20 /* Clear line side RX statistics counters */ ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 0); + + /* set mtu to max */ + ipn3ke_25G_mtu_setup(hw, i, 0); + ipn3ke_25G_mtu_setup(hw, i, 1); } } =20 diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.h b/drivers/net/ipn3ke/ipn3ke= _ethdev.h index c7b336b..b04e5d3 100644 --- a/drivers/net/ipn3ke/ipn3ke_ethdev.h +++ b/drivers/net/ipn3ke/ipn3ke_ethdev.h @@ -654,6 +654,25 @@ static inline void _ipn3ke_indrct_write(struct ipn3ke_= hw *hw, #define IPN3KE_MAC_RX_FRAME_MAXLENGTH_MASK \ IPN3KE_MASK(0xFFFF, IPN3KE_MAC_RX_FRAME_MAXLENGTH_SHIFT) =20 +/* Additional Feature Register */ +#define ADD_PHY_CTRL 0x0 +#define PHY_RESET BIT(0) +/* registers for 25G/40G mac */ +#define MAC_CONFIG 0x310 +#define MAC_RESET_MASK GENMASK(2, 0) + +#define IPN3KE_MAX_MTU 0xffff + +#define IPN3KE_25G_PHY_PMA_SLOOP 0x313 +#define IPN3KE_25G_TX_FLOW_CTRL 0x640 +#define IPN3KE_25G_MAX_TX_SIZE_CONFIG 0x407 +#define IPN3KE_25G_MAX_RX_SIZE_CONFIG 0x506 + +#define IPN3KE_10G_TX_PAUSE_FRAME_QUANTA 0x42 +#define IPN3KE_10G_TX_PAUSE_FRAME_HOLDOFF 0x43 +#define IPN3KE_10G_TX_FRAME_MAXLENGTH 0x2c +#define IPN3KE_10G_RX_FRAME_MAXLENGTH 0xae + #define IPN3KE_REGISTER_WIDTH 32 =20 /*Bits[2:0]: Configuration of TX statistics counters: @@ -1076,4 +1095,40 @@ static inline void ipn3ke_xmac_smac_ovd_dis(struct i= pn3ke_hw *hw, eth_group_sel); } =20 +static inline void ipn3ke_10G_mtu_setup (struct ipn3ke_hw *hw, uint32_t=20 +mac_num, uint32_t eth_group_sel) { + uint32_t tmp =3D IPN3KE_MAC_FRAME_SIZE_MAX; + + (*hw->f_mac_write)(hw, + tmp, + IPN3KE_10G_TX_FRAME_MAXLENGTH, + mac_num, + eth_group_sel); + + (*hw->f_mac_write)(hw, + tmp, + IPN3KE_10G_RX_FRAME_MAXLENGTH, + mac_num, + eth_group_sel); +} + +static inline void ipn3ke_25G_mtu_setup (struct ipn3ke_hw *hw, uint32_t=20 +mac_num, uint32_t eth_group_sel) { + uint32_t tmp =3D IPN3KE_MAC_FRAME_SIZE_MAX; + + (*hw->f_mac_write)(hw, + tmp, + IPN3KE_25G_MAX_TX_SIZE_CONFIG, + mac_num, + eth_group_sel); + + (*hw->f_mac_write)(hw, + tmp, + IPN3KE_25G_MAX_RX_SIZE_CONFIG, + mac_num, + eth_group_sel); +} + #endif /* _IPN3KE_ETHDEV_H_ */ -- 1.8.3.1