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From: "Richardson, Bruce" <bruce.richardson@intel.com>
To: Shreyansh Jain <shreyansh.jain@nxp.com>, "Xu, Rosen" <rosen.xu@intel.com>, 
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Thread-Topic: [PATCH v5 0/3] Introduce Intel FPGA BUS
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Date: Wed, 4 Apr 2018 10:38:28 +0000
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Subject: Re: [dpdk-dev] [PATCH v5 0/3] Introduce Intel FPGA BUS
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> -----Original Message-----
> From: Shreyansh Jain [mailto:shreyansh.jain@nxp.com]
> Sent: Wednesday, April 4, 2018 11:14 AM
> To: Xu, Rosen <rosen.xu@intel.com>; dev@dpdk.org
> Cc: Doherty, Declan <declan.doherty@intel.com>; Richardson, Bruce
> <bruce.richardson@intel.com>; Yigit, Ferruh <ferruh.yigit@intel.com>;
> Ananyev, Konstantin <konstantin.ananyev@intel.com>; Zhang, Tianfei
> <tianfei.zhang@intel.com>; Wu, Hao <hao.wu@intel.com>;
> gaetan.rivet@6wind.com
> Subject: RE: [PATCH v5 0/3] Introduce Intel FPGA BUS
>=20
> Hello Rosen,
>=20
> > -----Original Message-----
> > From: Rosen Xu [mailto:rosen.xu@intel.com]
> > Sent: Wednesday, April 4, 2018 12:21 PM
> > To: dev@dpdk.org
> > Cc: declan.doherty@intel.com; bruce.richardson@intel.com; Shreyansh
> > Jain <shreyansh.jain@nxp.com>; ferruh.yigit@intel.com;
> > konstantin.ananyev@intel.com; tianfei.zhang@intel.com;
> > hao.wu@intel.com; gaetan.rivet@6wind.com
> > Subject: [PATCH v5 0/3] Introduce Intel FPGA BUS
> >
> > Intel FPGA BUS in DPDK
> > -------------------------
> >
> > This patch set introduces Intel FPGA BUS support in DPDK.
> >
> > v5 updates:
> > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
> >  - Fixed SHARED LIB Build issue
> >  - Changed command name to IFPGA Rawdev name,
> >    so remove pci library datastruct and function.
> >  - Fixed PATCH v2/v3/v4 comments
> >
>=20
> [...]
>=20
> Primary problems I see with your patches:
> 1. They are not split enough. Still the patch 2/3 is dependent on 3/3.
> That mean, it would break the compilation. There is no simpler way to
> solve this except breaking the patch into multiple patches and slowly
> introducing each function/feature.
>  (One obvious way would be to have 3/3 as 2/3 and vice-versa - Not sure
> what that blocks).
>=20
> 2. Documentation - there is none right now. Being a special use case for
> PCI, I think a lot of people would benefit if you can explain the comment=
s
> about why iFPGA bus is required through documentation.
>=20
> 3. Meson as requested by Bruce. Problem you will face is that rawdev
> doesn't yet have meson enabled. I will work on that. If you can still
> rework your patches for (1)+(2), I think meson enable over rawdev would b=
e
> trivial.

I just spotted this and I've sent a patch for rawdev. It was pretty trivial=
. :-)
Please review and ack if you have the chance. The skeleton rawdev however, =
I haven't
done, so feel free to patch in that.

/Bruce