From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8DBCFA04B5; Fri, 6 Nov 2020 17:39:11 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 23F51160; Fri, 6 Nov 2020 17:39:10 +0100 (CET) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id 47529A3 for ; Fri, 6 Nov 2020 17:39:07 +0100 (CET) IronPort-SDR: 4I7bFBsBJgyfMtBNpwhYEiyTfpcK7MsTBQQQXdwTDYxagIh5KNKMhdTrQx0OOtUb7fMLoCRDBV NhqWiaHlougg== X-IronPort-AV: E=McAfee;i="6000,8403,9797"; a="169715525" X-IronPort-AV: E=Sophos;i="5.77,457,1596524400"; d="scan'208";a="169715525" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2020 08:39:02 -0800 IronPort-SDR: FBj97d3KBURuX7MHSLnXv/m242CvRvAibMHr8r1QEYpmn+nvKnpPXLUtqcVUVXblrx5CycVxd6 XIn6xsF/HOrQ== X-IronPort-AV: E=Sophos;i="5.77,457,1596524400"; d="scan'208";a="539902908" Received: from fyigit-mobl1.ger.corp.intel.com (HELO [10.213.228.45]) ([10.213.228.45]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2020 08:39:01 -0800 To: Lijun Ou Cc: dev@dpdk.org, linuxarm@huawei.com References: <1604586194-29523-1-git-send-email-oulijun@huawei.com> <1604634716-43484-1-git-send-email-oulijun@huawei.com> <1604634716-43484-3-git-send-email-oulijun@huawei.com> From: Ferruh Yigit Message-ID: <59c4a8e3-fddc-cae7-3b8e-f52631407e4b@intel.com> Date: Fri, 6 Nov 2020 16:38:57 +0000 MIME-Version: 1.0 In-Reply-To: <1604634716-43484-3-git-send-email-oulijun@huawei.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH v2 2/5] net/hns3: use unsigned types for bit operator X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 11/6/2020 3:51 AM, Lijun Ou wrote: > From: Hongbo Zheng > > According to bit operator reliability style, variables in > the right expression participating int bit operation > cannot be of unsigned type. Assuming this is talking about BIT() ("#define BIT(nr) (1UL << (nr))"), is this description says, in the "a << b", 'b' can't be unsigned? The code below does the opposite, "int i" -> "uint32_t i", even though there is a typo in above description, why 'b' can't be signed? It can't be negative, but not sure if is it a problem to have it signed. Also only first change in this patch seems related to the patch title and the description, rest looks related to signed / unsigned comparison fixes, if so can you separate them into their patch with proper description please? > > Signed-off-by: Hongbo Zheng > Signed-off-by: Lijun Ou > --- > drivers/net/hns3/hns3_ethdev_vf.c | 2 +- > drivers/net/hns3/hns3_rxtx_vec_neon.h | 11 +++++------ > 2 files changed, 6 insertions(+), 7 deletions(-) > > diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c > index 6f71cd6..2e9bfda 100644 > --- a/drivers/net/hns3/hns3_ethdev_vf.c > +++ b/drivers/net/hns3/hns3_ethdev_vf.c > @@ -1331,7 +1331,7 @@ hns3vf_get_tc_info(struct hns3_hw *hw) > { > uint8_t resp_msg; > int ret; > - int i; > + uint32_t i; > > ret = hns3_send_mbx_msg(hw, HNS3_MBX_GET_TCINFO, 0, NULL, 0, > true, &resp_msg, sizeof(resp_msg)); > diff --git a/drivers/net/hns3/hns3_rxtx_vec_neon.h b/drivers/net/hns3/hns3_rxtx_vec_neon.h > index 8d7721b..fe525de 100644 > --- a/drivers/net/hns3/hns3_rxtx_vec_neon.h > +++ b/drivers/net/hns3/hns3_rxtx_vec_neon.h > @@ -89,13 +89,12 @@ hns3_desc_parse_field(struct hns3_rx_queue *rxq, > struct hns3_desc *rxdp, > uint32_t bd_vld_num) > { > - uint32_t l234_info, ol_info, bd_base_info; > + uint32_t l234_info, ol_info, bd_base_info, cksum_err, i; Not sure combining more variable declarations into same line is good idea, why not have their own lines? > struct rte_mbuf *pkt; > uint32_t retcode = 0; > - uint32_t cksum_err; > - int ret, i; > + int ret; > > - for (i = 0; i < (int)bd_vld_num; i++) { > + for (i = 0; i < bd_vld_num; i++) { > pkt = sw_ring[i].mbuf; > > /* init rte_mbuf.rearm_data last 64-bit */ > @@ -129,9 +128,9 @@ hns3_recv_burst_vec(struct hns3_rx_queue *__restrict rxq, > uint16_t rx_id = rxq->next_to_use; > struct hns3_entry *sw_ring = &rxq->sw_ring[rx_id]; > struct hns3_desc *rxdp = &rxq->rx_ring[rx_id]; > - uint32_t bd_valid_num, parse_retcode; > + uint32_t bd_valid_num, parse_retcode, pos; > uint16_t nb_rx = 0; > - int pos, offset; > + int offset; > > /* mask to shuffle from desc to mbuf's rx_descriptor_fields1 */ > uint8x16_t shuf_desc_fields_msk = { >