From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) by dpdk.org (Postfix) with ESMTP id 5F7AB1B1D4; Thu, 11 Jan 2018 21:19:45 +0100 (CET) Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 7F44081DE5; Thu, 11 Jan 2018 20:19:44 +0000 (UTC) Received: from [10.36.112.28] (ovpn-112-28.ams2.redhat.com [10.36.112.28]) by smtp.corp.redhat.com (Postfix) with ESMTPS id D125C17990; Thu, 11 Jan 2018 20:19:39 +0000 (UTC) To: jianfeng.tan@intel.com Cc: dev@dpdk.org, stable@dpdk.org, santosh.shukla@caviumnetworks.com, anatoly.burakov@intel.com, thomas@monjalon.net, stephen@networkplumber.org, peterx@redhat.com References: <20180109131801.26520-1-maxime.coquelin@redhat.com> From: Maxime Coquelin Message-ID: <5c168150-7dcc-c110-a3d6-968738d781f7@redhat.com> Date: Thu, 11 Jan 2018 21:19:38 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.2 MIME-Version: 1.0 In-Reply-To: <20180109131801.26520-1-maxime.coquelin@redhat.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Thu, 11 Jan 2018 20:19:44 +0000 (UTC) Subject: Re: [dpdk-dev] [PATCH v2] bus/pci: forbid VA as IOVA mode if IOMMU address width too small X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 11 Jan 2018 20:19:45 -0000 Hi Jianfeng, On 01/09/2018 02:18 PM, Maxime Coquelin wrote: > Intel VT-d supports different address widths for the IOVAs, from > 39 bits to 56 bits. > > While recent processors support at least 48 bits, VT-d emulation > currently only supports 39 bits. It makes DMA mapping to fail in this > case when using VA as IOVA mode, as user-space virtual addresses uses > up to 47 bits (see kernel's Documentation/x86/x86_64/mm.txt). > > This patch parses VT-d CAP register value available in sysfs, and > forbid VA as IOVA mode if the GAW is 39 bits or unknown. > > Fixes: f37dfab21c98 ("drivers/net: enable IOVA mode for Intel PMDs") > > Cc: stable@dpdk.org > Signed-off-by: Maxime Coquelin > --- > > Changes in v2: > ============== > - Rework pci_one_device_iommu_support_va #ifdefery (Stephen) > - Don't inline introduced functions (Stephen) > > drivers/bus/pci/linux/pci.c | 108 ++++++++++++++++++++++++++++++++++++++++---- > 1 file changed, 99 insertions(+), 9 deletions(-) > Could you please try the patch and confirm it does not break your --no-huge usecase? Are you fine with the fix? Thanks, Maxime