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dmarc=fail action=none header.from=nxp.com;caviumnetworks.com; dkim=none (message not signed) header.d=none; Received-SPF: Fail (protection.outlook.com: domain of nxp.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Received: from tx30smr01.am.freescale.net (192.88.168.50) by BL2FFO11FD049.mail.protection.outlook.com (10.173.161.211) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.789.10 via Frontend Transport; Mon, 19 Dec 2016 05:27:25 +0000 Received: from [127.0.0.1] ([10.232.133.65]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id uBJ5RI76019247; Sun, 18 Dec 2016 22:27:22 -0700 To: Jerin Jacob References: <1480875447-23680-1-git-send-email-hemant.agrawal@nxp.com> <1480875447-23680-3-git-send-email-hemant.agrawal@nxp.com> <20161215060453.GA19354@localhost.localdomain> CC: , , , , Cristian Sovaiala From: Hemant Agrawal Message-ID: <5d84ac9c-b25a-f056-5501-1c16d4224b83@nxp.com> Date: Mon, 19 Dec 2016 10:57:18 +0530 User-Agent: Mozilla/5.0 (Windows NT 6.1; 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Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY2PR0301MB1575 Subject: Re: [dpdk-dev] [PATCH 02/32] drivers/common: introducing dpaa2 mc driver X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 19 Dec 2016 05:27:28 -0000 On 12/15/2016 11:34 AM, Jerin Jacob wrote: > On Sun, Dec 04, 2016 at 11:46:57PM +0530, Hemant Agrawal wrote: >> This patch intoduces the DPAA2 MC(Management complex Driver) >> >> This driver is common to be used by various DPAA2 net, crypto >> and other drivers >> >> Signed-off-by: Cristian Sovaiala >> [Hemant:rebase and conversion to library for DPDK] >> Signed-off-by: Hemant Agrawal >> +#ifndef _FSL_MC_SYS_H >> +#define _FSL_MC_SYS_H >> + >> +#ifdef __linux_driver__ >> + >> +#include >> +#include >> +#include >> + >> +struct fsl_mc_io { >> + void *regs; >> +}; >> + >> +#ifndef ENOTSUP >> +#define ENOTSUP 95 >> +#endif >> + >> +#define ioread64(_p) readq(_p) >> +#define iowrite64(_v, _p) writeq(_v, _p) >> + >> +#else /* __linux_driver__ */ >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +#define cpu_to_le64(x) __cpu_to_le64(x) >> +#ifndef dmb >> +#define dmb() {__asm__ __volatile__("" : : : "memory"); } >> +#endif > > Better to use DPDK macros here. > >> +#define __iormb() dmb() >> +#define __iowmb() dmb() >> +#define __arch_getq(a) (*(volatile unsigned long *)(a)) >> +#define __arch_putq(v, a) (*(volatile unsigned long *)(a) = (v)) >> +#define __arch_putq32(v, a) (*(volatile unsigned int *)(a) = (v)) >> +#define readq(c) \ >> + ({ uint64_t __v = __arch_getq(c); __iormb(); __v; }) >> +#define writeq(v, c) \ >> + ({ uint64_t __v = v; __iowmb(); __arch_putq(__v, c); __v; }) >> +#define writeq32(v, c) \ >> + ({ uint32_t __v = v; __iowmb(); __arch_putq32(__v, c); __v; }) >> +#define ioread64(_p) readq(_p) >> +#define iowrite64(_v, _p) writeq(_v, _p) >> +#define iowrite32(_v, _p) writeq32(_v, _p) > > Hopefully, we can clean all this once rte_read32 and rte_write32 becomes > mainline > > http://dpdk.org/dev/patchwork/patch/17935/ I agree, We will update it as your other patch progresses. >> +#define __iomem >> + >> +struct fsl_mc_io { >> + void *regs; >> +}; >> + >> +#ifndef ENOTSUP >> +#define ENOTSUP 95 >> +#endif >> + >> +/*GPP is supposed to use MC commands with low priority*/ >> +#define CMD_PRI_LOW 0 /*!< Low Priority command indication */ >> + >> +struct mc_command; >> + >> +int mc_send_command(struct fsl_mc_io *mc_io, struct mc_command *cmd); >> + >> +#endif /* __linux_driver__ */ >> + >> +#endif /* _FSL_MC_SYS_H */ >> + >> +/** User space framework uses MC Portal in shared mode. Following change >> +* introduces lock in MC FLIB >> +*/ >> + >> +/** >> +* The mc_spinlock_t type. >> +*/ >> +typedef struct { >> + volatile int locked; /**< lock status 0 = unlocked, 1 = locked */ >> +} mc_spinlock_t; >> + >> +/** >> +* A static spinlock initializer. >> +*/ >> +static mc_spinlock_t mc_portal_lock = { 0 }; >> + >> +static inline void mc_pause(void) {} >> + >> +static inline void mc_spinlock_lock(mc_spinlock_t *sl) >> +{ >> + while (__sync_lock_test_and_set(&sl->locked, 1)) >> + while (sl->locked) >> + mc_pause(); >> +} >> + >> +static inline void mc_spinlock_unlock(mc_spinlock_t *sl) >> +{ >> + __sync_lock_release(&sl->locked); >> +} >> + > > DPDK spinlock can be used here. > Yes!