From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 948B3A0A0B; Mon, 25 Jan 2021 11:01:20 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4C151140E11; Mon, 25 Jan 2021 11:01:19 +0100 (CET) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mails.dpdk.org (Postfix) with ESMTP id 0B98B140DE1; Mon, 25 Jan 2021 11:01:17 +0100 (CET) IronPort-SDR: 7W8E5ail8oPe038aV3VNf8jAEzQ5nSW1arJTDi5K0alI+AtOwyw+B0gj5lG/cdzl8aquPK1C6N SvT1YpE/aw0Q== X-IronPort-AV: E=McAfee;i="6000,8403,9874"; a="264523053" X-IronPort-AV: E=Sophos;i="5.79,373,1602572400"; d="scan'208";a="264523053" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jan 2021 02:01:16 -0800 IronPort-SDR: rGQ+zHhMScByDUDintY1bIa3ruFRFEuSXhNcFa5pDjQuUh60YVGzgWLBIzW0XtdQK2KO/T6Rcd joujgrUNK9uw== X-IronPort-AV: E=Sophos;i="5.79,373,1602572400"; d="scan'208";a="361412383" Received: from fyigit-mobl1.ger.corp.intel.com (HELO [10.213.243.89]) ([10.213.243.89]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jan 2021 02:01:14 -0800 To: "Huang, Wei" , "dev@dpdk.org" , "Xu, Rosen" , "Zhang, Qi Z" Cc: "stable@dpdk.org" , "Zhang, Tianfei" , Ray Kinsella References: <1611209014-4031-1-git-send-email-wei.huang@intel.com> <1611209014-4031-2-git-send-email-wei.huang@intel.com> <974f2f71-3607-fa25-b618-d5bb2c5652e7@intel.com> From: Ferruh Yigit Message-ID: <5f1aa155-64c4-2922-b76d-31130e22ed66@intel.com> Date: Mon, 25 Jan 2021 10:01:11 +0000 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Subject: Re: [dpdk-dev] [dpdk-stable] [PATCH v11 1/4] raw/ifpga: add fpga rsu function X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 1/22/2021 2:18 AM, Huang, Wei wrote: >> >> -----Original Message----- >> From: Ferruh Yigit >> Sent: Friday, January 22, 2021 00:30 >> To: Huang, Wei ; dev@dpdk.org; Xu, Rosen ; Zhang, Qi Z >> Cc: stable@dpdk.org; Zhang, Tianfei ; Ray Kinsella >> Subject: Re: [dpdk-stable] [PATCH v11 1/4] raw/ifpga: add fpga rsu function >> >> On 1/21/2021 6:03 AM, Wei Huang wrote: >>> RSU (Remote System Update) depends on secure manager which may be >>> different on various implementations, so a new secure manager device >>> is implemented for adapting such difference. >>> There are three major functions added: >>> 1. ifpga_rawdev_update_flash() updates flash with specific image file. >>> 2. ifpga_rawdev_stop_flash_update() aborts flash update process. >>> 3. ifpga_rawdev_reload() reloads FPGA from updated flash. >>> >>> Signed-off-by: Wei Huang >>> Acked-by: Tianfei Zhang >>> Acked-by: Rosen Xu >> >> <...> >> >>> @@ -76,4 +76,9 @@ int >>> ifpga_unregister_msix_irq(enum ifpga_irq_type type, >>> int vec_start, rte_intr_callback_fn handler, void *arg); >>> >>> +int ifpga_rawdev_update_flash(struct rte_rawdev *dev, const char *image, >>> +uint64_t *status); >>> +int ifpga_rawdev_stop_flash_update(struct rte_rawdev *dev, int >>> +force); int ifpga_rawdev_reload(struct rte_rawdev *dev, int type, int >>> +page); >>> + >>> #endif /* _IFPGA_RAWDEV_H_ */ >>> >> >> Hi Wei, >> >> Please help me understand the rawdev, who should be calling the above newly added functions? >> > > Hi Ferruh, > > Cyborg is an OpenStack project that aims to provide a general purpose management framework for acceleration resources (i.e. various types of accelerators such as GPU, FPGA, NP, ODP, DPDK/SPDK and so on). > > To update the FPGA flash is one of requirements from Cyborg. Originally there are no such interfaces, so I added them. > > These interfaces use rte_rawdev to identify which FPGA to access, they will be called in opae_update_flash(), > opae_cancel_flash_update() and opae_reboot_device() in ifpga_opae_api.c . > > These opae_xxx function use PCI address to identify FPGA instead of rte_rawdev, so the caller has no need to know the existence of rte_rawdev. > In fact, Cyborg is Python application, these opae_xxx functions will be eventually wrapped in a Python module for Cyborg to call. > Thanks for clarification, I see what you are doing, but still I think these APIs are not belong to a driver, they look like more application level. @Wei, @Rosen, what do you think to keep only generic raw/ipfga APIs in the driver and move all 'ifpga_opae_api.c/h' to the sample application? In that case raw/ifpga APIs still can get the port_id as parameter, and the 'opae' layer in the sample can do the conversion?