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* [dpdk-dev] [PATCH] i40e: fix BW info update if no dcb enabled
@ 2015-11-22  9:19 Jingjing Wu
  2015-11-22 11:16 ` [dpdk-dev] [PATCH v2] " Jingjing Wu
  0 siblings, 1 reply; 5+ messages in thread
From: Jingjing Wu @ 2015-11-22  9:19 UTC (permalink / raw)
  To: dev

If DCB is not enabled, the BW info is not stored for VSI. This
patch fixes this issue by merging functions i40e_vsi_dump_bw_config
and i40e_vsi_get_bw_info together.

Fixes: c8b9a3e3fe1b (i40e: support DCB mode)

Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
---
 drivers/net/i40e/i40e_ethdev.c | 112 +++++++++++++----------------------------
 drivers/net/i40e/i40e_ethdev.h |  12 ++---
 2 files changed, 40 insertions(+), 84 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 2c51a0b..d7d7a08 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -3789,14 +3789,22 @@ i40e_update_default_filter_setting(struct i40e_vsi *vsi)
 	return i40e_vsi_add_mac(vsi, &filter);
 }
 
+#define I40E_3_BIT_MASK     0x7
+/*
+ * i40e_vsi_get_bw_config - Query VSI BW Information
+ * @vsi: the VSI to be queried
+ *
+ * Returns 0 on success, negative value on failure
+ */
 static int
-i40e_vsi_dump_bw_config(struct i40e_vsi *vsi)
+i40e_vsi_get_bw_config(struct i40e_vsi *vsi)
 {
 	struct i40e_aqc_query_vsi_bw_config_resp bw_config;
 	struct i40e_aqc_query_vsi_ets_sla_config_resp ets_sla_config;
 	struct i40e_hw *hw = &vsi->adapter->hw;
 	i40e_status ret;
 	int i;
+	uint32_t bw_max;
 
 	memset(&bw_config, 0, sizeof(bw_config));
 	ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
@@ -3815,17 +3823,29 @@ i40e_vsi_dump_bw_config(struct i40e_vsi *vsi)
 		return ret;
 	}
 
-	/* Not store the info yet, just print out */
-	PMD_DRV_LOG(INFO, "VSI bw limit:%u", bw_config.port_bw_limit);
-	PMD_DRV_LOG(INFO, "VSI max_bw:%u", bw_config.max_bw);
+	/* store and print out BW info */
+	vsi->bw_info.bw_limit = rte_le_to_cpu_16(bw_config.port_bw_limit);
+	vsi->bw_info.bw_max = bw_config.max_bw;
+	PMD_DRV_LOG(DEBUG, "VSI bw limit:%u", bw_config.port_bw_limit);
+	PMD_DRV_LOG(DEBUG, "VSI max_bw:%u", bw_config.max_bw);
+	bw_max = rte_le_to_cpu_16(ets_sla_config.tc_bw_max[0]) |
+		    (rte_le_to_cpu_16(ets_sla_config.tc_bw_max[1]) <<
+		     I40E_16_BIT_WIDTH);
 	for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
-		PMD_DRV_LOG(INFO, "\tVSI TC%u:share credits %u", i,
-			    ets_sla_config.share_credits[i]);
-		PMD_DRV_LOG(INFO, "\tVSI TC%u:credits %u", i,
-			    rte_le_to_cpu_16(ets_sla_config.credits[i]));
-		PMD_DRV_LOG(INFO, "\tVSI TC%u: max credits: %u", i,
-			    rte_le_to_cpu_16(ets_sla_config.credits[i / 4]) >>
-			    (i * 4));
+		vsi->bw_info.bw_ets_share_credits[i] =
+				ets_sla_config.share_credits[i];
+		vsi->bw_info.bw_ets_credits[i] =
+				rte_le_to_cpu_16(ets_sla_config.credits[i]);
+		/* 4 bits per TC, 4th bit is reserved */
+		vsi->bw_info.bw_ets_max[i] =
+			(uint8_t)((bw_max >> (i * I40E_4_BIT_WIDTH)) &
+				  I40E_3_BIT_MASK);
+		PMD_DRV_LOG(DEBUG, "\tVSI TC%u:share credits %u", i,
+			    vsi->bw_info.bw_ets_share_credits[i]);
+		PMD_DRV_LOG(DEBUG, "\tVSI TC%u:credits %u", i,
+			    vsi->bw_info.bw_ets_credits[i]);
+		PMD_DRV_LOG(DEBUG, "\tVSI TC%u: max credits: %u", i,
+			    vsi->bw_info.bw_ets_max[i]);
 	}
 
 	return 0;
@@ -4154,7 +4174,7 @@ i40e_vsi_setup(struct i40e_pf *pf,
 	}
 
 	/* Get VSI BW information */
-	i40e_vsi_dump_bw_config(vsi);
+	i40e_vsi_get_bw_config(vsi);
 	return vsi;
 fail_msix_alloc:
 	i40e_res_pool_free(&pf->msix_pool,vsi->msix_intr);
@@ -8081,70 +8101,6 @@ i40e_parse_dcb_configure(struct rte_eth_dev *dev,
 	return 0;
 }
 
-/*
- * i40e_vsi_get_bw_info - Query VSI BW Information
- * @vsi: the VSI being queried
- *
- * Returns 0 on success, negative value on failure
- */
-static enum i40e_status_code
-i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
-{
-	struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
-	struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
-	struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
-	enum i40e_status_code ret;
-	int i;
-	uint32_t tc_bw_max;
-
-	/* Get the VSI level BW configuration */
-	ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
-	if (ret) {
-		PMD_INIT_LOG(ERR,
-			 "couldn't get PF vsi bw config, err %s aq_err %s\n",
-			 i40e_stat_str(hw, ret),
-			 i40e_aq_str(hw, hw->aq.asq_last_status));
-		return ret;
-	}
-
-	/* Get the VSI level BW configuration per TC */
-	ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
-						  NULL);
-	if (ret) {
-		PMD_INIT_LOG(ERR,
-			 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
-			 i40e_stat_str(hw, ret),
-			 i40e_aq_str(hw, hw->aq.asq_last_status));
-		return ret;
-	}
-
-	if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
-		PMD_INIT_LOG(WARNING,
-			 "Enabled TCs mismatch from querying VSI BW info"
-			 " 0x%08x 0x%08x\n", bw_config.tc_valid_bits,
-			 bw_ets_config.tc_valid_bits);
-		/* Still continuing */
-	}
-
-	vsi->bw_info.bw_limit = rte_le_to_cpu_16(bw_config.port_bw_limit);
-	vsi->bw_info.bw_max_quanta = bw_config.max_bw;
-	tc_bw_max = rte_le_to_cpu_16(bw_ets_config.tc_bw_max[0]) |
-		    (rte_le_to_cpu_16(bw_ets_config.tc_bw_max[1]) << 16);
-	for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
-		vsi->bw_info.bw_ets_share_credits[i] =
-				bw_ets_config.share_credits[i];
-		vsi->bw_info.bw_ets_limit_credits[i] =
-				rte_le_to_cpu_16(bw_ets_config.credits[i]);
-		/* 3 bits out of 4 for each TC */
-		vsi->bw_info.bw_ets_max_quanta[i] =
-			(uint8_t)((tc_bw_max >> (i * 4)) & 0x7);
-		PMD_INIT_LOG(DEBUG,
-			 "%s: vsi seid = %d, TC = %d, qset = 0x%x\n",
-			 __func__, vsi->seid, i, bw_config.qs_handles[i]);
-	}
-
-	return ret;
-}
 
 static enum i40e_status_code
 i40e_vsi_update_queue_mapping(struct i40e_vsi *vsi,
@@ -8278,8 +8234,8 @@ i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 tc_map)
 	vsi->info.mapping_flags = ctxt.info.mapping_flags;
 	vsi->info.valid_sections = 0;
 
-	/* Update current VSI BW information */
-	ret = i40e_vsi_get_bw_info(vsi);
+	/* query and update current VSI BW information */
+	ret = i40e_vsi_get_bw_config(vsi);
 	if (ret) {
 		PMD_INIT_LOG(ERR,
 			 "Failed updating vsi bw info, err %s aq_err %s",
diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h
index be705f7..1f9792b 100644
--- a/drivers/net/i40e/i40e_ethdev.h
+++ b/drivers/net/i40e/i40e_ethdev.h
@@ -219,14 +219,14 @@ struct i40e_macvlan_filter {
 /* Bandwidth limit information */
 struct i40e_bw_info {
 	uint16_t bw_limit;      /* BW Limit (0 = disabled) */
-	uint8_t  bw_max_quanta; /* Max Quanta when BW limit is enabled */
+	uint8_t  bw_max;        /* Max BW limit if enabled */
 
-	/* Relative TC credits across VSIs */
+	/* Relative VSI credits within same TC with respect to other VSIs */
 	uint8_t  bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS];
-	/* TC BW limit credits within VSI */
-	uint8_t  bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS];
-	/* TC BW limit max quanta within VSI */
-	uint8_t  bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS];
+	/* Bandwidth limit per TC */
+	uint8_t  bw_ets_credits[I40E_MAX_TRAFFIC_CLASS];
+	/* Max bandwidth limit per TC */
+	uint8_t  bw_ets_max[I40E_MAX_TRAFFIC_CLASS];
 };
 
 /*
-- 
2.4.0

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [dpdk-dev] [PATCH v2] i40e: fix BW info update if no dcb enabled
  2015-11-22  9:19 [dpdk-dev] [PATCH] i40e: fix BW info update if no dcb enabled Jingjing Wu
@ 2015-11-22 11:16 ` Jingjing Wu
  2015-11-22 12:35   ` [dpdk-dev] [PATCH v3] " Jingjing Wu
  0 siblings, 1 reply; 5+ messages in thread
From: Jingjing Wu @ 2015-11-22 11:16 UTC (permalink / raw)
  To: dev

If DCB is not enabled, the BW info is not stored for VSI. This
patch fixes this issue by merging functions i40e_vsi_dump_bw_config
and i40e_vsi_get_bw_info together.

Fixes: c8b9a3e3fe1b (i40e: support DCB mode)

Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
---
 drivers/net/i40e/i40e_ethdev.c | 112 +++++++++++++----------------------------
 drivers/net/i40e/i40e_ethdev.h |  12 ++---
 2 files changed, 40 insertions(+), 84 deletions(-)

v2 changes:
 - correct the value used in debug log.

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 2c51a0b..d6b9f62 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -3789,14 +3789,22 @@ i40e_update_default_filter_setting(struct i40e_vsi *vsi)
 	return i40e_vsi_add_mac(vsi, &filter);
 }
 
+#define I40E_3_BIT_MASK     0x7
+/*
+ * i40e_vsi_get_bw_config - Query VSI BW Information
+ * @vsi: the VSI to be queried
+ *
+ * Returns 0 on success, negative value on failure
+ */
 static int
-i40e_vsi_dump_bw_config(struct i40e_vsi *vsi)
+i40e_vsi_get_bw_config(struct i40e_vsi *vsi)
 {
 	struct i40e_aqc_query_vsi_bw_config_resp bw_config;
 	struct i40e_aqc_query_vsi_ets_sla_config_resp ets_sla_config;
 	struct i40e_hw *hw = &vsi->adapter->hw;
 	i40e_status ret;
 	int i;
+	uint32_t bw_max;
 
 	memset(&bw_config, 0, sizeof(bw_config));
 	ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
@@ -3815,17 +3823,29 @@ i40e_vsi_dump_bw_config(struct i40e_vsi *vsi)
 		return ret;
 	}
 
-	/* Not store the info yet, just print out */
-	PMD_DRV_LOG(INFO, "VSI bw limit:%u", bw_config.port_bw_limit);
-	PMD_DRV_LOG(INFO, "VSI max_bw:%u", bw_config.max_bw);
+	/* store and print out BW info */
+	vsi->bw_info.bw_limit = rte_le_to_cpu_16(bw_config.port_bw_limit);
+	vsi->bw_info.bw_max = bw_config.max_bw;
+	PMD_DRV_LOG(DEBUG, "VSI bw limit:%u", vsi->bw_info.bw_limit);
+	PMD_DRV_LOG(DEBUG, "VSI max_bw:%u", vsi->bw_info.bw_max);
+	bw_max = rte_le_to_cpu_16(ets_sla_config.tc_bw_max[0]) |
+		    (rte_le_to_cpu_16(ets_sla_config.tc_bw_max[1]) <<
+		     I40E_16_BIT_WIDTH);
 	for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
-		PMD_DRV_LOG(INFO, "\tVSI TC%u:share credits %u", i,
-			    ets_sla_config.share_credits[i]);
-		PMD_DRV_LOG(INFO, "\tVSI TC%u:credits %u", i,
-			    rte_le_to_cpu_16(ets_sla_config.credits[i]));
-		PMD_DRV_LOG(INFO, "\tVSI TC%u: max credits: %u", i,
-			    rte_le_to_cpu_16(ets_sla_config.credits[i / 4]) >>
-			    (i * 4));
+		vsi->bw_info.bw_ets_share_credits[i] =
+				ets_sla_config.share_credits[i];
+		vsi->bw_info.bw_ets_credits[i] =
+				rte_le_to_cpu_16(ets_sla_config.credits[i]);
+		/* 4 bits per TC, 4th bit is reserved */
+		vsi->bw_info.bw_ets_max[i] =
+			(uint8_t)((bw_max >> (i * I40E_4_BIT_WIDTH)) &
+				  I40E_3_BIT_MASK);
+		PMD_DRV_LOG(DEBUG, "\tVSI TC%u:share credits %u", i,
+			    vsi->bw_info.bw_ets_share_credits[i]);
+		PMD_DRV_LOG(DEBUG, "\tVSI TC%u:credits %u", i,
+			    vsi->bw_info.bw_ets_credits[i]);
+		PMD_DRV_LOG(DEBUG, "\tVSI TC%u: max credits: %u", i,
+			    vsi->bw_info.bw_ets_max[i]);
 	}
 
 	return 0;
@@ -4154,7 +4174,7 @@ i40e_vsi_setup(struct i40e_pf *pf,
 	}
 
 	/* Get VSI BW information */
-	i40e_vsi_dump_bw_config(vsi);
+	i40e_vsi_get_bw_config(vsi);
 	return vsi;
 fail_msix_alloc:
 	i40e_res_pool_free(&pf->msix_pool,vsi->msix_intr);
@@ -8081,70 +8101,6 @@ i40e_parse_dcb_configure(struct rte_eth_dev *dev,
 	return 0;
 }
 
-/*
- * i40e_vsi_get_bw_info - Query VSI BW Information
- * @vsi: the VSI being queried
- *
- * Returns 0 on success, negative value on failure
- */
-static enum i40e_status_code
-i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
-{
-	struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
-	struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
-	struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
-	enum i40e_status_code ret;
-	int i;
-	uint32_t tc_bw_max;
-
-	/* Get the VSI level BW configuration */
-	ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
-	if (ret) {
-		PMD_INIT_LOG(ERR,
-			 "couldn't get PF vsi bw config, err %s aq_err %s\n",
-			 i40e_stat_str(hw, ret),
-			 i40e_aq_str(hw, hw->aq.asq_last_status));
-		return ret;
-	}
-
-	/* Get the VSI level BW configuration per TC */
-	ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
-						  NULL);
-	if (ret) {
-		PMD_INIT_LOG(ERR,
-			 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
-			 i40e_stat_str(hw, ret),
-			 i40e_aq_str(hw, hw->aq.asq_last_status));
-		return ret;
-	}
-
-	if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
-		PMD_INIT_LOG(WARNING,
-			 "Enabled TCs mismatch from querying VSI BW info"
-			 " 0x%08x 0x%08x\n", bw_config.tc_valid_bits,
-			 bw_ets_config.tc_valid_bits);
-		/* Still continuing */
-	}
-
-	vsi->bw_info.bw_limit = rte_le_to_cpu_16(bw_config.port_bw_limit);
-	vsi->bw_info.bw_max_quanta = bw_config.max_bw;
-	tc_bw_max = rte_le_to_cpu_16(bw_ets_config.tc_bw_max[0]) |
-		    (rte_le_to_cpu_16(bw_ets_config.tc_bw_max[1]) << 16);
-	for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
-		vsi->bw_info.bw_ets_share_credits[i] =
-				bw_ets_config.share_credits[i];
-		vsi->bw_info.bw_ets_limit_credits[i] =
-				rte_le_to_cpu_16(bw_ets_config.credits[i]);
-		/* 3 bits out of 4 for each TC */
-		vsi->bw_info.bw_ets_max_quanta[i] =
-			(uint8_t)((tc_bw_max >> (i * 4)) & 0x7);
-		PMD_INIT_LOG(DEBUG,
-			 "%s: vsi seid = %d, TC = %d, qset = 0x%x\n",
-			 __func__, vsi->seid, i, bw_config.qs_handles[i]);
-	}
-
-	return ret;
-}
 
 static enum i40e_status_code
 i40e_vsi_update_queue_mapping(struct i40e_vsi *vsi,
@@ -8278,8 +8234,8 @@ i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 tc_map)
 	vsi->info.mapping_flags = ctxt.info.mapping_flags;
 	vsi->info.valid_sections = 0;
 
-	/* Update current VSI BW information */
-	ret = i40e_vsi_get_bw_info(vsi);
+	/* query and update current VSI BW information */
+	ret = i40e_vsi_get_bw_config(vsi);
 	if (ret) {
 		PMD_INIT_LOG(ERR,
 			 "Failed updating vsi bw info, err %s aq_err %s",
diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h
index be705f7..1f9792b 100644
--- a/drivers/net/i40e/i40e_ethdev.h
+++ b/drivers/net/i40e/i40e_ethdev.h
@@ -219,14 +219,14 @@ struct i40e_macvlan_filter {
 /* Bandwidth limit information */
 struct i40e_bw_info {
 	uint16_t bw_limit;      /* BW Limit (0 = disabled) */
-	uint8_t  bw_max_quanta; /* Max Quanta when BW limit is enabled */
+	uint8_t  bw_max;        /* Max BW limit if enabled */
 
-	/* Relative TC credits across VSIs */
+	/* Relative VSI credits within same TC with respect to other VSIs */
 	uint8_t  bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS];
-	/* TC BW limit credits within VSI */
-	uint8_t  bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS];
-	/* TC BW limit max quanta within VSI */
-	uint8_t  bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS];
+	/* Bandwidth limit per TC */
+	uint8_t  bw_ets_credits[I40E_MAX_TRAFFIC_CLASS];
+	/* Max bandwidth limit per TC */
+	uint8_t  bw_ets_max[I40E_MAX_TRAFFIC_CLASS];
 };
 
 /*
-- 
2.4.0

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [dpdk-dev] [PATCH v3] i40e: fix BW info update if no dcb enabled
  2015-11-22 11:16 ` [dpdk-dev] [PATCH v2] " Jingjing Wu
@ 2015-11-22 12:35   ` Jingjing Wu
  2015-11-22 13:52     ` Zhang, Helin
  0 siblings, 1 reply; 5+ messages in thread
From: Jingjing Wu @ 2015-11-22 12:35 UTC (permalink / raw)
  To: dev

If DCB is not enabled, the BW info is not stored for VSI. This
patch fixes this issue by merging functions i40e_vsi_dump_bw_config
and i40e_vsi_get_bw_info together.

Fixes: c8b9a3e3fe1b (i40e: support DCB mode)

Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
---
 drivers/net/i40e/i40e_ethdev.c | 116 +++++++++++++----------------------------
 drivers/net/i40e/i40e_ethdev.h |  12 ++---
 2 files changed, 42 insertions(+), 86 deletions(-)

v2 changes:
 - correct the value used in debug log.
v3 changes:
 - change the function's return value from int to enum.

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 2c51a0b..f5a8f37 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -3789,14 +3789,22 @@ i40e_update_default_filter_setting(struct i40e_vsi *vsi)
 	return i40e_vsi_add_mac(vsi, &filter);
 }
 
-static int
-i40e_vsi_dump_bw_config(struct i40e_vsi *vsi)
+#define I40E_3_BIT_MASK     0x7
+/*
+ * i40e_vsi_get_bw_config - Query VSI BW Information
+ * @vsi: the VSI to be queried
+ *
+ * Returns 0 on success, negative value on failure
+ */
+static enum i40e_status_code
+i40e_vsi_get_bw_config(struct i40e_vsi *vsi)
 {
 	struct i40e_aqc_query_vsi_bw_config_resp bw_config;
 	struct i40e_aqc_query_vsi_ets_sla_config_resp ets_sla_config;
 	struct i40e_hw *hw = &vsi->adapter->hw;
 	i40e_status ret;
 	int i;
+	uint32_t bw_max;
 
 	memset(&bw_config, 0, sizeof(bw_config));
 	ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
@@ -3815,20 +3823,32 @@ i40e_vsi_dump_bw_config(struct i40e_vsi *vsi)
 		return ret;
 	}
 
-	/* Not store the info yet, just print out */
-	PMD_DRV_LOG(INFO, "VSI bw limit:%u", bw_config.port_bw_limit);
-	PMD_DRV_LOG(INFO, "VSI max_bw:%u", bw_config.max_bw);
+	/* store and print out BW info */
+	vsi->bw_info.bw_limit = rte_le_to_cpu_16(bw_config.port_bw_limit);
+	vsi->bw_info.bw_max = bw_config.max_bw;
+	PMD_DRV_LOG(DEBUG, "VSI bw limit:%u", vsi->bw_info.bw_limit);
+	PMD_DRV_LOG(DEBUG, "VSI max_bw:%u", vsi->bw_info.bw_max);
+	bw_max = rte_le_to_cpu_16(ets_sla_config.tc_bw_max[0]) |
+		    (rte_le_to_cpu_16(ets_sla_config.tc_bw_max[1]) <<
+		     I40E_16_BIT_WIDTH);
 	for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
-		PMD_DRV_LOG(INFO, "\tVSI TC%u:share credits %u", i,
-			    ets_sla_config.share_credits[i]);
-		PMD_DRV_LOG(INFO, "\tVSI TC%u:credits %u", i,
-			    rte_le_to_cpu_16(ets_sla_config.credits[i]));
-		PMD_DRV_LOG(INFO, "\tVSI TC%u: max credits: %u", i,
-			    rte_le_to_cpu_16(ets_sla_config.credits[i / 4]) >>
-			    (i * 4));
+		vsi->bw_info.bw_ets_share_credits[i] =
+				ets_sla_config.share_credits[i];
+		vsi->bw_info.bw_ets_credits[i] =
+				rte_le_to_cpu_16(ets_sla_config.credits[i]);
+		/* 4 bits per TC, 4th bit is reserved */
+		vsi->bw_info.bw_ets_max[i] =
+			(uint8_t)((bw_max >> (i * I40E_4_BIT_WIDTH)) &
+				  I40E_3_BIT_MASK);
+		PMD_DRV_LOG(DEBUG, "\tVSI TC%u:share credits %u", i,
+			    vsi->bw_info.bw_ets_share_credits[i]);
+		PMD_DRV_LOG(DEBUG, "\tVSI TC%u:credits %u", i,
+			    vsi->bw_info.bw_ets_credits[i]);
+		PMD_DRV_LOG(DEBUG, "\tVSI TC%u: max credits: %u", i,
+			    vsi->bw_info.bw_ets_max[i]);
 	}
 
-	return 0;
+	return I40E_SUCCESS;
 }
 
 /* Setup a VSI */
@@ -4154,7 +4174,7 @@ i40e_vsi_setup(struct i40e_pf *pf,
 	}
 
 	/* Get VSI BW information */
-	i40e_vsi_dump_bw_config(vsi);
+	i40e_vsi_get_bw_config(vsi);
 	return vsi;
 fail_msix_alloc:
 	i40e_res_pool_free(&pf->msix_pool,vsi->msix_intr);
@@ -8081,70 +8101,6 @@ i40e_parse_dcb_configure(struct rte_eth_dev *dev,
 	return 0;
 }
 
-/*
- * i40e_vsi_get_bw_info - Query VSI BW Information
- * @vsi: the VSI being queried
- *
- * Returns 0 on success, negative value on failure
- */
-static enum i40e_status_code
-i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
-{
-	struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
-	struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
-	struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
-	enum i40e_status_code ret;
-	int i;
-	uint32_t tc_bw_max;
-
-	/* Get the VSI level BW configuration */
-	ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
-	if (ret) {
-		PMD_INIT_LOG(ERR,
-			 "couldn't get PF vsi bw config, err %s aq_err %s\n",
-			 i40e_stat_str(hw, ret),
-			 i40e_aq_str(hw, hw->aq.asq_last_status));
-		return ret;
-	}
-
-	/* Get the VSI level BW configuration per TC */
-	ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
-						  NULL);
-	if (ret) {
-		PMD_INIT_LOG(ERR,
-			 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
-			 i40e_stat_str(hw, ret),
-			 i40e_aq_str(hw, hw->aq.asq_last_status));
-		return ret;
-	}
-
-	if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
-		PMD_INIT_LOG(WARNING,
-			 "Enabled TCs mismatch from querying VSI BW info"
-			 " 0x%08x 0x%08x\n", bw_config.tc_valid_bits,
-			 bw_ets_config.tc_valid_bits);
-		/* Still continuing */
-	}
-
-	vsi->bw_info.bw_limit = rte_le_to_cpu_16(bw_config.port_bw_limit);
-	vsi->bw_info.bw_max_quanta = bw_config.max_bw;
-	tc_bw_max = rte_le_to_cpu_16(bw_ets_config.tc_bw_max[0]) |
-		    (rte_le_to_cpu_16(bw_ets_config.tc_bw_max[1]) << 16);
-	for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
-		vsi->bw_info.bw_ets_share_credits[i] =
-				bw_ets_config.share_credits[i];
-		vsi->bw_info.bw_ets_limit_credits[i] =
-				rte_le_to_cpu_16(bw_ets_config.credits[i]);
-		/* 3 bits out of 4 for each TC */
-		vsi->bw_info.bw_ets_max_quanta[i] =
-			(uint8_t)((tc_bw_max >> (i * 4)) & 0x7);
-		PMD_INIT_LOG(DEBUG,
-			 "%s: vsi seid = %d, TC = %d, qset = 0x%x\n",
-			 __func__, vsi->seid, i, bw_config.qs_handles[i]);
-	}
-
-	return ret;
-}
 
 static enum i40e_status_code
 i40e_vsi_update_queue_mapping(struct i40e_vsi *vsi,
@@ -8278,8 +8234,8 @@ i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 tc_map)
 	vsi->info.mapping_flags = ctxt.info.mapping_flags;
 	vsi->info.valid_sections = 0;
 
-	/* Update current VSI BW information */
-	ret = i40e_vsi_get_bw_info(vsi);
+	/* query and update current VSI BW information */
+	ret = i40e_vsi_get_bw_config(vsi);
 	if (ret) {
 		PMD_INIT_LOG(ERR,
 			 "Failed updating vsi bw info, err %s aq_err %s",
diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h
index be705f7..1f9792b 100644
--- a/drivers/net/i40e/i40e_ethdev.h
+++ b/drivers/net/i40e/i40e_ethdev.h
@@ -219,14 +219,14 @@ struct i40e_macvlan_filter {
 /* Bandwidth limit information */
 struct i40e_bw_info {
 	uint16_t bw_limit;      /* BW Limit (0 = disabled) */
-	uint8_t  bw_max_quanta; /* Max Quanta when BW limit is enabled */
+	uint8_t  bw_max;        /* Max BW limit if enabled */
 
-	/* Relative TC credits across VSIs */
+	/* Relative VSI credits within same TC with respect to other VSIs */
 	uint8_t  bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS];
-	/* TC BW limit credits within VSI */
-	uint8_t  bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS];
-	/* TC BW limit max quanta within VSI */
-	uint8_t  bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS];
+	/* Bandwidth limit per TC */
+	uint8_t  bw_ets_credits[I40E_MAX_TRAFFIC_CLASS];
+	/* Max bandwidth limit per TC */
+	uint8_t  bw_ets_max[I40E_MAX_TRAFFIC_CLASS];
 };
 
 /*
-- 
2.4.0

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [dpdk-dev] [PATCH v3] i40e: fix BW info update if no dcb enabled
  2015-11-22 12:35   ` [dpdk-dev] [PATCH v3] " Jingjing Wu
@ 2015-11-22 13:52     ` Zhang, Helin
  2015-11-23 22:11       ` Thomas Monjalon
  0 siblings, 1 reply; 5+ messages in thread
From: Zhang, Helin @ 2015-11-22 13:52 UTC (permalink / raw)
  To: Wu, Jingjing, dev



> -----Original Message-----
> From: Wu, Jingjing
> Sent: Sunday, November 22, 2015 8:35 PM
> To: dev@dpdk.org
> Cc: Wu, Jingjing; Zhang, Helin
> Subject: [PATCH v3] i40e: fix BW info update if no dcb enabled
> 
> If DCB is not enabled, the BW info is not stored for VSI. This patch fixes this
> issue by merging functions i40e_vsi_dump_bw_config and
> i40e_vsi_get_bw_info together.
> 
> Fixes: c8b9a3e3fe1b (i40e: support DCB mode)
> 
> Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>

Thanks for the fix, it makes things clearer and simpler.

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [dpdk-dev] [PATCH v3] i40e: fix BW info update if no dcb enabled
  2015-11-22 13:52     ` Zhang, Helin
@ 2015-11-23 22:11       ` Thomas Monjalon
  0 siblings, 0 replies; 5+ messages in thread
From: Thomas Monjalon @ 2015-11-23 22:11 UTC (permalink / raw)
  To: Wu, Jingjing; +Cc: dev

> > If DCB is not enabled, the BW info is not stored for VSI. This patch fixes this
> > issue by merging functions i40e_vsi_dump_bw_config and
> > i40e_vsi_get_bw_info together.
> > 
> > Fixes: c8b9a3e3fe1b (i40e: support DCB mode)
> > 
> > Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
> Acked-by: Helin Zhang <helin.zhang@intel.com>
> 
> Thanks for the fix, it makes things clearer and simpler.

Applied, thanks

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2015-11-23 22:13 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-11-22  9:19 [dpdk-dev] [PATCH] i40e: fix BW info update if no dcb enabled Jingjing Wu
2015-11-22 11:16 ` [dpdk-dev] [PATCH v2] " Jingjing Wu
2015-11-22 12:35   ` [dpdk-dev] [PATCH v3] " Jingjing Wu
2015-11-22 13:52     ` Zhang, Helin
2015-11-23 22:11       ` Thomas Monjalon

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