From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 61C95A0524; Tue, 13 Apr 2021 13:38:58 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D5713160E65; Tue, 13 Apr 2021 13:38:57 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id 710FE160E59 for ; Tue, 13 Apr 2021 13:38:56 +0200 (CEST) IronPort-SDR: GYETGoeA/gH6iZk6C+/h9xCykyEDdF06XMonrI1kkqa2nRy84yYkC/TXtYph6eSHjY8gGTVZc+ dVtB5YJpvO/w== X-IronPort-AV: E=McAfee;i="6200,9189,9952"; a="194506269" X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="194506269" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2021 04:38:55 -0700 IronPort-SDR: MsISM34OJtcbwxK5g3rmPkp5Neuw4kboDPy3mTq4TYBBb4UuaebzZ8X8mGlaHzRPYZ2RgHlTAy SVxvsbRbmNqg== X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="460551215" Received: from fyigit-mobl1.ger.corp.intel.com (HELO [10.213.204.251]) ([10.213.204.251]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2021 04:38:53 -0700 To: "Yang, Qiming" , "Zhang, Qi Z" Cc: "dev@dpdk.org" References: <20210329141411.2395069-1-qi.z.zhang@intel.com> <20210413050640.2586033-1-qi.z.zhang@intel.com> From: Ferruh Yigit X-User: ferruhy Message-ID: <646d2732-2e3a-488c-557d-638e024cb6f8@intel.com> Date: Tue, 13 Apr 2021 12:38:50 +0100 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Subject: Re: [dpdk-dev] [PATCH v2 00/14] base code update batch 2 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 4/13/2021 7:16 AM, Yang, Qiming wrote: > >> -----Original Message----- >> From: Zhang, Qi Z >> Sent: 2021年4月13日 13:06 >> To: Yang, Qiming >> Cc: dev@dpdk.org; Zhang, Qi Z >> Subject: [PATCH v2 00/14] base code update batch 2 >> >> v2: >> - Added patch 9/14 - 14/14. >> >> Qi Zhang (14): >> net/ice/base: code cleanup >> net/ice/base: support removing VSI from flow profile >> net/ice/base: print link configure error >> net/ice/base: remove unused ptype field in PTT definition >> net/ice/base: set MAC type for E823C device >> net/ice/base: change protocol ID for VLAN in case of DVM >> net/ice/base: enable I2C read/write commands >> net/ice/base: add RSS support for PPPoL2TPv2oUDP >> net/ice/base: add set/get GPIO helper functions >> net/ice/base: add priority check of matching recipe >> net/ice/base: add inner VLAN protocol type for QinQ filter >> net/ice/base: fix QinQ PPPoE dummy pkt selection >> net/ice/base: add PTYPE values for PPPoL2TPv2oUDP >> net/ice/base: allow support for GTP-U filter using only inner >> protocols >> >> drivers/net/ice/base/ice_adminq_cmd.h | 40 ++++++ >> drivers/net/ice/base/ice_common.c | 162 ++++++++++++++++++++++- >> drivers/net/ice/base/ice_common.h | 14 ++ >> drivers/net/ice/base/ice_dcb.c | 2 +- >> drivers/net/ice/base/ice_fdir.c | 2 +- >> drivers/net/ice/base/ice_flex_pipe.c | 4 +- >> drivers/net/ice/base/ice_flex_type.h | 31 ++++- >> drivers/net/ice/base/ice_flow.c | 120 ++++++++++++++--- >> drivers/net/ice/base/ice_flow.h | 4 + >> drivers/net/ice/base/ice_lan_tx_rx.h | 10 +- >> drivers/net/ice/base/ice_protocol_type.h | 4 + >> drivers/net/ice/base/ice_sched.c | 11 +- >> drivers/net/ice/base/ice_switch.c | 77 +++++++---- >> drivers/net/ice/base/ice_switch.h | 1 + >> drivers/net/ice/base/ice_type.h | 2 - >> drivers/net/ice/base/ice_vlan_mode.c | 3 +- >> drivers/net/ice/base/ice_vlan_mode.h | 1 - >> 17 files changed, 424 insertions(+), 64 deletions(-) >> >> -- >> 2.26.2 > > Acked-by: Qiming Yang > Hi Qiming, Qi, The set fails to build, please check reports on patchwork: https://patches.dpdk.org/project/dpdk/patch/20210413050640.2586033-15-qi.z.zhang@intel.com/