From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 82290A0613 for ; Wed, 25 Sep 2019 14:38:52 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 715ED1BE8F; Wed, 25 Sep 2019 14:38:51 +0200 (CEST) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by dpdk.org (Postfix) with ESMTP id D64FE1BE8E for ; Wed, 25 Sep 2019 14:38:49 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Sep 2019 05:38:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,548,1559545200"; d="scan'208";a="183242535" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by orsmga008.jf.intel.com with ESMTP; 25 Sep 2019 05:38:48 -0700 Received: from fmsmsx118.amr.corp.intel.com (10.18.116.18) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 25 Sep 2019 05:38:48 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by fmsmsx118.amr.corp.intel.com (10.18.116.18) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 25 Sep 2019 05:38:47 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.32]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.132]) with mapi id 14.03.0439.000; Wed, 25 Sep 2019 20:38:46 +0800 From: "Su, Simei" To: "Ye, Xiaolong" CC: "Zhang, Qi Z" , "Wu, Jingjing" , "dev@dpdk.org" Thread-Topic: [PATCH v2 1/2] ethdev: extend RSS offload types Thread-Index: AQHVcpZwhy+lFJ5L10+ZZvQEJNewt6c7spEAgACZYRD//4CWAIAAimFA Date: Wed, 25 Sep 2019 12:38:44 +0000 Message-ID: <65F28F834D25B54B9EC1999B623071B30C44A6EF@SHSMSX104.ccr.corp.intel.com> References: <1565328915-135315-1-git-send-email-simei.su@intel.com> <1569247539-101249-1-git-send-email-simei.su@intel.com> <1569247539-101249-2-git-send-email-simei.su@intel.com> <20190925104938.GG60476@intel.com> <65F28F834D25B54B9EC1999B623071B30C44A674@SHSMSX104.ccr.corp.intel.com> <20190925122234.GD15446@intel.com> In-Reply-To: <20190925122234.GD15446@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMzVlOTQ0OGEtM2UwMS00Y2E5LTg3MjYtZGExNmE4ZjkwYzdhIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiYTlVeUpJWkdhcU5yVUFqcDBaY2ZGNU43ajU5U0VJY1p3ZkdOMVJPa2Y5d1U0cklGdk1GOGVTcXdrb2l4WFwvVHkifQ== x-ctpclassification: CTP_NT x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2 1/2] ethdev: extend RSS offload types X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Ye, Xiaolong > Sent: Wednesday, September 25, 2019 8:23 PM > To: Su, Simei > Cc: Zhang, Qi Z ; Wu, Jingjing ; > dev@dpdk.org > Subject: Re: [PATCH v2 1/2] ethdev: extend RSS offload types >=20 > On 09/25, Su, Simei wrote: > >Hi, xiaolong > > > >> -----Original Message----- > >> From: Ye, Xiaolong > >> Sent: Wednesday, September 25, 2019 6:50 PM > >> To: Su, Simei > >> Cc: Zhang, Qi Z ; Wu, Jingjing > >> ; dev@dpdk.org > >> Subject: Re: [PATCH v2 1/2] ethdev: extend RSS offload types > >> > >> On 09/23, Simei Su wrote: > >> >This patch cover two aspects: > >> > (1)decouple RTE_ETH_FLOW_* and ETH_RSS_*. Because both serve > >> > different purposes. > >> > > >> > (2)reserve several bits as input set selection from bottom > >> > of the 64 bits. It is combined with exisiting ETH_RSS_* to > >> > represent rss types. > >> > > >> > for example: > >> > ETH_RSS_IPV4 | ETH_RSS_L3_SRC_ONLY: hash on src ip address only > >> > ETH_RSS_IPV4_UDP | ETH_RSS_L4_DST_ONLY: hash on src/dst IP and > >> > dst UDP port > >> > ETH_RSS_L2_PAYLOAD | ETH_RSS_L2_DST_ONLY: hash on dst mac > >> address > >> > >> We also need to document well about what happens if users just set > >> ETH_RSS_IPV4, both both src/dst ip still are taken into account, right= ? > >> > > > > Yes, when users set ETH_RSS_IPV4, both src and dst ip are taken into > account. > > I will add this example. Thanks! >=20 > Please add it in the code comments or doc rather than the commit log. >=20 Ok, I will add it in the code comments. > Thanks, > Xiaolong >=20 > > > >> Thanks, > >> Xiaolong > >> > >> > >> > > >> >Signed-off-by: Simei Su > >> >--- > >> > lib/librte_ethdev/rte_ethdev.h | 60 > >> >++++++++++++++++++++++++------------------ > >> > 1 file changed, 35 insertions(+), 25 deletions(-) > >> > > >> >diff --git a/lib/librte_ethdev/rte_ethdev.h > >> >b/lib/librte_ethdev/rte_ethdev.h index d987178..7e6530d 100644 > >> >--- a/lib/librte_ethdev/rte_ethdev.h > >> >+++ b/lib/librte_ethdev/rte_ethdev.h > >> >@@ -482,31 +482,41 @@ struct rte_eth_rss_conf { > >> > #define RTE_ETH_FLOW_MAX 23 > >> > > >> > /* > >> >- * The RSS offload types are defined based on flow types. > >> >- * Different NIC hardware may support different RSS offload > >> >- * types. The supported flow types or RSS offload types can be > >> >queried by > >> >- * rte_eth_dev_info_get(). > >> >- */ > >> >-#define ETH_RSS_IPV4 (1ULL << RTE_ETH_FLOW_IPV4) > >> >-#define ETH_RSS_FRAG_IPV4 (1ULL << > >> RTE_ETH_FLOW_FRAG_IPV4) > >> >-#define ETH_RSS_NONFRAG_IPV4_TCP (1ULL << > >> RTE_ETH_FLOW_NONFRAG_IPV4_TCP) > >> >-#define ETH_RSS_NONFRAG_IPV4_UDP (1ULL << > >> RTE_ETH_FLOW_NONFRAG_IPV4_UDP) > >> >-#define ETH_RSS_NONFRAG_IPV4_SCTP (1ULL << > >> >RTE_ETH_FLOW_NONFRAG_IPV4_SCTP) -#define > >> ETH_RSS_NONFRAG_IPV4_OTHER (1ULL << > >> RTE_ETH_FLOW_NONFRAG_IPV4_OTHER) > >> >-#define ETH_RSS_IPV6 (1ULL << RTE_ETH_FLOW_IPV6) > >> >-#define ETH_RSS_FRAG_IPV6 (1ULL << > >> RTE_ETH_FLOW_FRAG_IPV6) > >> >-#define ETH_RSS_NONFRAG_IPV6_TCP (1ULL << > >> RTE_ETH_FLOW_NONFRAG_IPV6_TCP) > >> >-#define ETH_RSS_NONFRAG_IPV6_UDP (1ULL << > >> RTE_ETH_FLOW_NONFRAG_IPV6_UDP) > >> >-#define ETH_RSS_NONFRAG_IPV6_SCTP (1ULL << > >> >RTE_ETH_FLOW_NONFRAG_IPV6_SCTP) -#define > >> ETH_RSS_NONFRAG_IPV6_OTHER (1ULL << > >> RTE_ETH_FLOW_NONFRAG_IPV6_OTHER) > >> >-#define ETH_RSS_L2_PAYLOAD (1ULL << > >> RTE_ETH_FLOW_L2_PAYLOAD) > >> >-#define ETH_RSS_IPV6_EX (1ULL << > RTE_ETH_FLOW_IPV6_EX) > >> >-#define ETH_RSS_IPV6_TCP_EX (1ULL << > >> RTE_ETH_FLOW_IPV6_TCP_EX) > >> >-#define ETH_RSS_IPV6_UDP_EX (1ULL << > >> RTE_ETH_FLOW_IPV6_UDP_EX) > >> >-#define ETH_RSS_PORT (1ULL << RTE_ETH_FLOW_PORT) > >> >-#define ETH_RSS_VXLAN (1ULL << > RTE_ETH_FLOW_VXLAN) > >> >-#define ETH_RSS_GENEVE (1ULL << > RTE_ETH_FLOW_GENEVE) > >> >-#define ETH_RSS_NVGRE (1ULL << > RTE_ETH_FLOW_NVGRE) > >> >+ * Below macros are defined for RSS offload types, they can be used > >> >+to > >> >+ * fill rte_eth_rss_conf.rss_hf or rte_flow_action_rss.types. > >> >+ */ > >> >+#define ETH_RSS_IPV4 (1ULL << 2) > >> >+#define ETH_RSS_FRAG_IPV4 (1ULL << 3) > >> >+#define ETH_RSS_NONFRAG_IPV4_TCP (1ULL << 4) > >> >+#define ETH_RSS_NONFRAG_IPV4_UDP (1ULL << 5) > >> >+#define ETH_RSS_NONFRAG_IPV4_SCTP (1ULL << 6) #define > >> >+ETH_RSS_NONFRAG_IPV4_OTHER (1ULL << 7) > >> >+#define ETH_RSS_IPV6 (1ULL << 8) > >> >+#define ETH_RSS_FRAG_IPV6 (1ULL << 9) > >> >+#define ETH_RSS_NONFRAG_IPV6_TCP (1ULL << 10) > >> >+#define ETH_RSS_NONFRAG_IPV6_UDP (1ULL << 11) > >> >+#define ETH_RSS_NONFRAG_IPV6_SCTP (1ULL << 12) #define > >> >+ETH_RSS_NONFRAG_IPV6_OTHER (1ULL << 13) > >> >+#define ETH_RSS_L2_PAYLOAD (1ULL << 14) > >> >+#define ETH_RSS_IPV6_EX (1ULL << 15) > >> >+#define ETH_RSS_IPV6_TCP_EX (1ULL << 16) > >> >+#define ETH_RSS_IPV6_UDP_EX (1ULL << 17) > >> >+#define ETH_RSS_PORT (1ULL << 18) > >> >+#define ETH_RSS_VXLAN (1ULL << 19) > >> >+#define ETH_RSS_GENEVE (1ULL << 20) > >> >+#define ETH_RSS_NVGRE (1ULL << 21) > >> >+ > >> >+/* > >> >+ * We use the following macros to combine with above ETH_RSS_* for > >> >+ * more specific input set selection. These bits are defined > >> >+starting > >> >+ * from the bottom of the 64 bits. > >> >+ */ > >> >+#define ETH_RSS_L2_SRC_ONLY (1ULL << 63) > >> >+#define ETH_RSS_L2_DST_ONLY (1ULL << 62) > >> >+#define ETH_RSS_L3_SRC_ONLY (1ULL << 61) > >> >+#define ETH_RSS_L3_DST_ONLY (1ULL << 60) > >> >+#define ETH_RSS_L4_SRC_ONLY (1ULL << 59) > >> >+#define ETH_RSS_L4_DST_ONLY (1ULL << 58) > >> > > >> > #define ETH_RSS_IP ( \ > >> > ETH_RSS_IPV4 | \ > >> >-- > >> >1.8.3.1 > >> >