From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3DDF6A04BC; Fri, 9 Oct 2020 11:11:14 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 1EF761C23B; Fri, 9 Oct 2020 11:11:13 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id E93151C22E for ; Fri, 9 Oct 2020 11:11:11 +0200 (CEST) IronPort-SDR: 9NURl3XA4+Ovjp4NtGESurKdLdbY1gAQpIHs7X2zgwPkXLaPD/DCrUGvlxGvRxDkwAw1KrsRKD K24eaqkfLm7A== X-IronPort-AV: E=McAfee;i="6000,8403,9768"; a="162824740" X-IronPort-AV: E=Sophos;i="5.77,354,1596524400"; d="scan'208";a="162824740" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2020 02:11:09 -0700 IronPort-SDR: /P6g2OufmZaqJFaWPEAJ9KY+uoVTSM2FC1xhGylGUMIP384SUAvGvbFCboUhVUnZ751i5sAYXn fLzfUvyUyscg== X-IronPort-AV: E=Sophos;i="5.77,354,1596524400"; d="scan'208";a="462126581" Received: from pswirydc-mobl1.ger.corp.intel.com (HELO [10.213.3.170]) ([10.213.3.170]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2020 02:11:06 -0700 To: "Ananyev, Konstantin" , "Ma, Liang J" , "dev@dpdk.org" Cc: "Hunt, David" , "stephen@networkplumber.org" References: <1599214740-3927-1-git-send-email-liang.j.ma@intel.com> <1601647919-25312-1-git-send-email-liang.j.ma@intel.com> <1601647919-25312-2-git-send-email-liang.j.ma@intel.com> From: "Burakov, Anatoly" Message-ID: <665bcb31-dcf0-553b-bae1-054e5f50e77f@intel.com> Date: Fri, 9 Oct 2020 10:11:03 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:68.0) Gecko/20100101 Thunderbird/68.12.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH v4 02/10] eal: add power management intrinsics X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 08-Oct-20 6:15 PM, Ananyev, Konstantin wrote: >> >> Add two new power management intrinsics, and provide an implementation >> in eal/x86 based on UMONITOR/UMWAIT instructions. The instructions >> are implemented as raw byte opcodes because there is not yet widespread >> compiler support for these instructions. >> >> The power management instructions provide an architecture-specific >> function to either wait until a specified TSC timestamp is reached, or >> optionally wait until either a TSC timestamp is reached or a memory >> location is written to. The monitor function also provides an optional >> comparison, to avoid sleeping when the expected write has already >> happened, and no more writes are expected. > > I think what this API is missing - a function to wakeup sleeping core. > If user can/should use some system call to achieve that, then at least > it has to be clearly documented, even better some wrapper provided. I don't think it's possible to do that without severely overcomplicating the intrinsic and its usage, because AFAIK the only way to wake up a sleeping core would be to send some kind of interrupt to the core, or trigger a write to the cache-line in question. -- Thanks, Anatoly