DPDK patches and discussions
 help / color / mirror / Atom feed
From: Ferruh Yigit <ferruh.yigit@amd.com>
To: Sivaprasad Tummala <sivaprasad.tummala@amd.com>,
	bruce.richardson@intel.com, konstantin.v.ananyev@yandex.ru
Cc: dev@dpdk.org, David Marchand <david.marchand@redhat.com>
Subject: Re: [PATCH] eal/x86: add vendor ID checks for specific implementation
Date: Wed, 22 Nov 2023 11:25:32 +0000	[thread overview]
Message-ID: <66767370-5959-46b3-a58f-202d2411d266@amd.com> (raw)
In-Reply-To: <20231109052820.2129745-1-sivaprasad.tummala@amd.com>

On 11/9/2023 5:28 AM, Sivaprasad Tummala wrote:
> Current get_tsc_freq_arch() implementation is specific for
> Intel processors.
> 
> Added vendor checks to gracefully return on AMD EPYC processors.
> 

Hi Siva,

Is this fixing an issue in AMD platform, if so can you please describe
the impact of the issue and add fixes tag?


> Signed-off-by: Sivaprasad Tummala <sivaprasad.tummala@amd.com>
> ---
>  lib/eal/x86/rte_cycles.c | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> diff --git a/lib/eal/x86/rte_cycles.c b/lib/eal/x86/rte_cycles.c
> index 69ed59b4f0..f147a5231d 100644
> --- a/lib/eal/x86/rte_cycles.c
> +++ b/lib/eal/x86/rte_cycles.c
> @@ -10,6 +10,10 @@
>  #include <cpuid.h>
>  #endif
>  
> +#define x86_vendor_amd(t1, t2, t3)        \
> +	((t1 == 0x68747541) && /* htuA */   \
> +	 (t2 == 0x444d4163) && /* DMAc */   \
> +	 (t3 == 0x69746e65))   /* itne */
>  
>  #include "eal_private.h"
>  
> @@ -110,6 +114,18 @@ get_tsc_freq_arch(void)
>  	uint8_t mult, model;
>  	int32_t ret;
>  
> +#ifdef RTE_TOOLCHAIN_MSVC
> +	__cpuid(cpuinfo, 0);
>

We already discussed in the past to abstract the cpuid(), even David
sent a patch for it [1].

If this is customer facing issue, OK to get it as it is for the release,
but in long term I think better idea to switch to abstract.


[1]
https://patchwork.dpdk.org/project/dpdk/list/?series=29605&state=*


> +	a = cpuinfo[0];
> +	b = cpuinfo[1];
> +	c = cpuinfo[2];
> +	d = cpuinfo[3];
> +#else
> +	__cpuid(0, a, b, c, d);
> +#endif
> +	if (x86_vendor_amd(b, c, d))
> +		return 0;
> +
>  	/*
>  	 * Time Stamp Counter and Nominal Core Crystal Clock
>  	 * Information Leaf


  reply	other threads:[~2023-11-22 11:25 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-09  5:28 Sivaprasad Tummala
2023-11-22 11:25 ` Ferruh Yigit [this message]
2023-11-22 17:45   ` Tummala, Sivaprasad
2023-11-23  7:27 ` [PATCH v2] eal/x86: add AMD vendor check to choose TSC calibration Sivaprasad Tummala
2023-11-23 10:29   ` Ferruh Yigit
2024-02-13 15:14     ` Thomas Monjalon

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=66767370-5959-46b3-a58f-202d2411d266@amd.com \
    --to=ferruh.yigit@amd.com \
    --cc=bruce.richardson@intel.com \
    --cc=david.marchand@redhat.com \
    --cc=dev@dpdk.org \
    --cc=konstantin.v.ananyev@yandex.ru \
    --cc=sivaprasad.tummala@amd.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).