From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 54633A04BC; Sat, 10 Oct 2020 04:07:24 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A30271D656; Sat, 10 Oct 2020 04:07:22 +0200 (CEST) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by dpdk.org (Postfix) with ESMTP id 45BEF1D635 for ; Sat, 10 Oct 2020 04:07:21 +0200 (CEST) IronPort-SDR: b8L9sNy7cC98uvvCoWq6i0RDxficaGDl78XXLbjbYy11FY76/seB9N21G81zKGTIK5dWhwHC0Y EW+L8I3w4lSg== X-IronPort-AV: E=McAfee;i="6000,8403,9769"; a="144875426" X-IronPort-AV: E=Sophos;i="5.77,357,1596524400"; d="scan'208";a="144875426" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2020 19:07:18 -0700 IronPort-SDR: l7P/Q9roaH0S8K0Fwjmv9ghBa8GkkvP79zXE+DuXHpbNei3eZSelk9WwXFfeKSs9I094Tg6oKQ 6HFvw1ULQoOw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,357,1596524400"; d="scan'208";a="329087840" Received: from fmsmsx603.amr.corp.intel.com ([10.18.126.83]) by orsmga002.jf.intel.com with ESMTP; 09 Oct 2020 19:07:18 -0700 Received: from shsmsx601.ccr.corp.intel.com (10.109.6.141) by fmsmsx603.amr.corp.intel.com (10.18.126.83) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Fri, 9 Oct 2020 19:07:17 -0700 Received: from shsmsx601.ccr.corp.intel.com (10.109.6.141) by SHSMSX601.ccr.corp.intel.com (10.109.6.141) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Sat, 10 Oct 2020 10:07:15 +0800 Received: from shsmsx601.ccr.corp.intel.com ([10.109.6.141]) by SHSMSX601.ccr.corp.intel.com ([10.109.6.141]) with mapi id 15.01.1713.004; Sat, 10 Oct 2020 10:07:15 +0800 From: "Guo, Jia" To: "Power, Ciara" , "dev@dpdk.org" CC: "Xing, Beilei" Thread-Topic: [PATCH v3 04/18] net/i40e: add checks for max SIMD bitwidth Thread-Index: AQHWlyq/s/PAY45siUqFzHD08Wiz0KmOnvgwgAA2TgCAAU7QsA== Date: Sat, 10 Oct 2020 02:07:15 +0000 Message-ID: <67502c03bcf84485b217599dffd32419@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200930130415.11211-1-ciara.power@intel.com> <20200930130415.11211-5-ciara.power@intel.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-reaction: no-action dlp-version: 11.5.1.3 x-originating-ip: [10.239.127.36] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v3 04/18] net/i40e: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi, power > -----Original Message----- > From: Power, Ciara > Sent: Friday, October 9, 2020 10:03 PM > To: Guo, Jia ; dev@dpdk.org > Cc: Xing, Beilei > Subject: RE: [PATCH v3 04/18] net/i40e: add checks for max SIMD bitwidth >=20 > Hi Jeff, >=20 > >-----Original Message----- > >From: Guo, Jia > >Sent: Friday 9 October 2020 04:03 > >To: Power, Ciara ; dev@dpdk.org > >Cc: Xing, Beilei > >Subject: RE: [PATCH v3 04/18] net/i40e: add checks for max SIMD > >bitwidth > > > >Hi, power > > > >> -----Original Message----- > >> From: Power, Ciara > >> Sent: Wednesday, September 30, 2020 9:04 PM > >> To: dev@dpdk.org > >> Cc: Power, Ciara ; Xing, Beilei > >> ; Guo, Jia > >> Subject: [PATCH v3 04/18] net/i40e: add checks for max SIMD bitwidth > >> > >> When choosing a vector path to take, an extra condition must be > >> satisfied to ensure the max SIMD bitwidth allows for the CPU enabled > path. > >> > >> Cc: Beilei Xing > >> Cc: Jeff Guo > >> > >> Signed-off-by: Ciara Power > >> --- > >> drivers/net/i40e/i40e_rxtx.c | 19 +++++++++++++------ > >> 1 file changed, 13 insertions(+), 6 deletions(-) > >> > >> diff --git a/drivers/net/i40e/i40e_rxtx.c > >> b/drivers/net/i40e/i40e_rxtx.c index 60b33d20a1..9b535b52fa 100644 > >> --- a/drivers/net/i40e/i40e_rxtx.c > >> +++ b/drivers/net/i40e/i40e_rxtx.c > >> @@ -3098,7 +3098,8 @@ static eth_rx_burst_t > >> i40e_get_latest_rx_vec(bool > >> scatter) { #if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT) > >> -if > >> (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2)) > >> +if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) && > >> +rte_get_max_simd_bitwidth() >=3D > > > >Nitpick: I think if consistent to keep alignment for open parenthesis > >in this patch set would be better. Do you think so? > > >=20 > This file doesn't seem to have any if statements indented as you suggest, > Some do have a double indent for the continued line as I have done here > though. >=20 Sorry, maybe I didn't say clear, what I said is the "CHECK" as below when u= se checkpatch.pl to guaranty the patch's format. CHECK: Alignment should match open parenthesis #733: FILE: drivers/net/i40e/i40e_rxtx.c:3102: + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) && + rte_get_max_simd_bitwidth() >=3D RTE_MAX_256_SIMD) CHECK: Alignment should match open parenthesis #743: FILE: drivers/net/i40e/i40e_rxtx.c:3120: + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) && + rte_get_max_simd_bitwidth() >=3D RTE_MAX_256_SIMD) CHECK: Alignment should match open parenthesis #763: FILE: drivers/net/i40e/i40e_rxtx.c:3275: + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) && + rte_get_max_simd_bitwidth() >=3D RTE_MAX_256_SIMD) CHECK: Alignment should match open parenthesis #773: FILE: drivers/net/i40e/i40e_rxtx.c:3291: + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) && + rte_get_max_simd_bitwidth() >=3D RTE_MAX_256_SIMD) CHECK: Alignment should match open parenthesis #783: FILE: drivers/net/i40e/i40e_rxtx.c:3320: + if (ad->tx_vec_allowed && + rte_get_max_simd_bitwidth() > >=20 > Thanks, > Ciara >=20