From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <kirill.rybalchenko@intel.com>
Received: from mga14.intel.com (mga14.intel.com [192.55.52.115])
 by dpdk.org (Postfix) with ESMTP id C8C061B2FE
 for <dev@dpdk.org>; Tue, 16 Jan 2018 18:23:09 +0100 (CET)
X-Amp-Result: SKIPPED(no attachment in message)
X-Amp-File-Uploaded: False
Received: from orsmga002.jf.intel.com ([10.7.209.21])
 by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;
 16 Jan 2018 09:23:08 -0800
X-ExtLoop1: 1
X-IronPort-AV: E=Sophos;i="5.46,369,1511856000"; d="scan'208";a="26925896"
Received: from irsmsx102.ger.corp.intel.com ([163.33.3.155])
 by orsmga002.jf.intel.com with ESMTP; 16 Jan 2018 09:23:07 -0800
Received: from irsmsx108.ger.corp.intel.com ([169.254.11.167]) by
 IRSMSX102.ger.corp.intel.com ([169.254.2.180]) with mapi id 14.03.0319.002;
 Tue, 16 Jan 2018 17:23:06 +0000
From: "Rybalchenko, Kirill" <kirill.rybalchenko@intel.com>
To: Adrien Mazarguil <adrien.mazarguil@6wind.com>
CC: "dev@dpdk.org" <dev@dpdk.org>, "Wu, Jingjing" <jingjing.wu@intel.com>,
 "Xing, Beilei" <beilei.xing@intel.com>, "johndale@cisco.com"
 <johndale@cisco.com>, "neescoba@cisco.com" <neescoba@cisco.com>,
 "nelio.laranjeiro@6wind.com" <nelio.laranjeiro@6wind.com>,
 "yskoh@mellanox.com" <yskoh@mellanox.com>, "Lu, Wenzhuo"
 <wenzhuo.lu@intel.com>, "Ananyev, Konstantin" <konstantin.ananyev@intel.com>, 
 "Chilikin, Andrey" <andrey.chilikin@intel.com>
Thread-Topic: [PATCH] ethdev: increase flow type limit from 32 to 64
Thread-Index: AQHTZ3t0CyVfYr9MPEyxDBj4dGpSK6Mzf7UAgDhogPCACr7jAIAAZN/g
Date: Tue, 16 Jan 2018 17:23:05 +0000
Message-ID: <696B43C21188DF4F9C9091AAE4789B824E2B8CC8@IRSMSX108.ger.corp.intel.com>
References: <1511785787-127452-1-git-send-email-kirill.rybalchenko@intel.com>
 <20171204174304.GK4062@6wind.com>
 <696B43C21188DF4F9C9091AAE4789B824E2B6786@IRSMSX108.ger.corp.intel.com>
 <20180116111326.GD4256@6wind.com>
In-Reply-To: <20180116111326.GD4256@6wind.com>
Accept-Language: en-GB, en-US
Content-Language: en-US
X-MS-Has-Attach: 
X-MS-TNEF-Correlator: 
x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZjczNGMxOTYtMDEzMy00NWYyLWE5NDItZDYyNDdlODMyNDIzIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6IktYWDdVa1F3dU1GUEdYS0k3dlBubG1ud3NmODdJaEFLeXdOVUZySk40NzQ9In0=
x-ctpclassification: CTP_NT
dlp-product: dlpe-windows
dlp-version: 11.0.0.116
dlp-reaction: no-action
x-originating-ip: [163.33.239.181]
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: quoted-printable
MIME-Version: 1.0
Subject: Re: [dpdk-dev] [PATCH] ethdev: increase flow type limit from 32 to
	64
X-BeenThere: dev@dpdk.org
X-Mailman-Version: 2.1.15
Precedence: list
List-Id: DPDK patches and discussions <dev.dpdk.org>
List-Unsubscribe: <https://dpdk.org/ml/options/dev>,
 <mailto:dev-request@dpdk.org?subject=unsubscribe>
List-Archive: <http://dpdk.org/ml/archives/dev/>
List-Post: <mailto:dev@dpdk.org>
List-Help: <mailto:dev-request@dpdk.org?subject=help>
List-Subscribe: <https://dpdk.org/ml/listinfo/dev>,
 <mailto:dev-request@dpdk.org?subject=subscribe>
X-List-Received-Date: Tue, 16 Jan 2018 17:23:10 -0000

Hi Adrien,=20
after some discussion we found that change I've done=20
in Mellanox PMD is not really necessary: size of array
flow_types_mask[] is still 1 and the loop in patch=20

for (i =3D 0; i < RTE_FLOW_MASK_ARRAY_SIZE; i++)
	info->flow_types_mask[i] =3D 0ULL;

will work exactly in the same way  as assignment

fdir_info->flow_types_mask[0] =3D 0;

in old version, though new version looks more proper
from programming style point of view.
So what do you think, shall I modify Mellanox PMD,
or better leave it as it is?

Thanks,
Kirill.=20


> -----Original Message-----
> From: Adrien Mazarguil [mailto:adrien.mazarguil@6wind.com]
> Sent: Tuesday 16 January 2018 11:13
> To: Rybalchenko, Kirill <kirill.rybalchenko@intel.com>
> Cc: dev@dpdk.org; Wu, Jingjing <jingjing.wu@intel.com>; Xing, Beilei
> <beilei.xing@intel.com>; johndale@cisco.com; neescoba@cisco.com;
> nelio.laranjeiro@6wind.com; yskoh@mellanox.com; Lu, Wenzhuo
> <wenzhuo.lu@intel.com>; Ananyev, Konstantin
> <konstantin.ananyev@intel.com>; Chilikin, Andrey
> <andrey.chilikin@intel.com>
> Subject: Re: [PATCH] ethdev: increase flow type limit from 32 to 64
>=20
> On Tue, Jan 09, 2018 at 03:16:13PM +0000, Rybalchenko, Kirill wrote:
> > > -----Original Message-----
> > > From: Adrien Mazarguil [mailto:adrien.mazarguil@6wind.com]
> > > Sent: Monday 4 December 2017 17:43
> > > To: Rybalchenko, Kirill <kirill.rybalchenko@intel.com>
> > > Cc: dev@dpdk.org; Wu, Jingjing <jingjing.wu@intel.com>; Xing, Beilei
> > > <beilei.xing@intel.com>; johndale@cisco.com; neescoba@cisco.com;
> > > nelio.laranjeiro@6wind.com; yskoh@mellanox.com; Lu, Wenzhuo
> > > <wenzhuo.lu@intel.com>; Ananyev, Konstantin
> > > <konstantin.ananyev@intel.com>; Chilikin, Andrey
> > > <andrey.chilikin@intel.com>
> > > Subject: Re: [PATCH] ethdev: increase flow type limit from 32 to 64
> > >
> > > Hi Kirill,
> > >
> > > On Mon, Nov 27, 2017 at 12:29:47PM +0000, Kirill Rybalchenko wrote:
> > > > Increase the internal limit for flow types from 32 to 64 to
> > > > support future flow type extensions.
> > > > Change type of variables from uint32_t[] to uint64_t[]:
> > > >   rte_eth_fdir_info.flow_types_mask
> > > >   rte_eth_hash_global_conf.sym_hash_enable_mask
> > > >   rte_eth_hash_global_conf.valid_bit_mask
> > > >
> > > > This modification affects the following components:
> > > >   net/i40e
> > > >   net/enic
> > > >   net/mlx5
> > > >   net/ixgbe
> > > >   app/testpmd
> > > >
> > > > Signed-off-by: Kirill Rybalchenko <kirill.rybalchenko@intel.com>
> > >
> > > Can you elaborate a bit on the need for these changes?
> > > Have you considered implementing those future extensions through
> > > rte_flow instead?
> >
> > Hi Adrien, this is not a new feature but rather fix of existing limitat=
ion.
> > In current implementation the symmetric hash mask and flow mask are
> > represented by 32-bit variable, while hardware bitmask has 64 bits.
> > Unfortunately, this modification changes ABI of the library as it
> > changes size of rte_eth_fdir_info structure. All related PMDs (listed
> > above) had to be modified accordingly.
>=20
> OK, no problem with this change. I assume you'll re-submit it since you s=
ent a
> deprecation notice, we'll review/ack subsequent mlx5 patches.
>=20
> --
> Adrien Mazarguil
> 6WIND