From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 372F39E5 for ; Wed, 8 Jul 2015 08:42:22 +0200 (CEST) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga101.jf.intel.com with ESMTP; 07 Jul 2015 23:42:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,429,1432623600"; d="scan'208";a="742763632" Received: from kmsmsx153.gar.corp.intel.com ([172.21.73.88]) by fmsmga001.fm.intel.com with ESMTP; 07 Jul 2015 23:42:20 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by KMSMSX153.gar.corp.intel.com (172.21.73.88) with Microsoft SMTP Server (TLS) id 14.3.224.2; Wed, 8 Jul 2015 14:42:19 +0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.165]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.168]) with mapi id 14.03.0224.002; Wed, 8 Jul 2015 14:42:17 +0800 From: "Lu, Wenzhuo" To: "Wu, Jingjing" , "dev@dpdk.org" Thread-Topic: [PATCH] i40e: fix the build error with gcc 4.4 Thread-Index: AQHQuUiVA3vrqW+50ka2Q96zuRWG/Z3RHrRg Date: Wed, 8 Jul 2015 06:42:17 +0000 Message-ID: <6A0DE07E22DDAD4C9103DF62FEBC0909CF8625@shsmsx102.ccr.corp.intel.com> References: <1436337439-30665-1-git-send-email-jingjing.wu@intel.com> In-Reply-To: <1436337439-30665-1-git-send-email-jingjing.wu@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH] i40e: fix the build error with gcc 4.4 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 08 Jul 2015 06:42:22 -0000 Hi, > -----Original Message----- > From: Wu, Jingjing > Sent: Wednesday, July 8, 2015 2:37 PM > To: dev@dpdk.org > Cc: Wu, Jingjing; Lu, Wenzhuo > Subject: [PATCH] i40e: fix the build error with gcc 4.4 >=20 > Fix the build warning reported like: > error: dereferencing pointer 'cmd' does break strict-aliasing rules >=20 > Signed-off-by: Jingjing Wu Acked-by: Wenzhuo Lu > --- > drivers/net/i40e/i40e_ethdev.c | 27 ++++++++++++++------------- > 1 file changed, 14 insertions(+), 13 deletions(-) >=20 > diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethde= v.c > index 02d17b4..dcf91bb 100644 > --- a/drivers/net/i40e/i40e_ethdev.c > +++ b/drivers/net/i40e/i40e_ethdev.c > @@ -5786,8 +5786,7 @@ i40e_aq_add_mirror_rule(struct i40e_hw *hw, > uint16_t count, uint16_t *rule_id) > { > struct i40e_aq_desc desc; > - struct i40e_aqc_add_delete_mirror_rule *cmd =3D > - (struct i40e_aqc_add_delete_mirror_rule *)&desc.params.raw; > + struct i40e_aqc_add_delete_mirror_rule cmd; > struct i40e_aqc_add_delete_mirror_rule_completion *resp =3D > (struct i40e_aqc_add_delete_mirror_rule_completion *) > &desc.params.raw; > @@ -5796,18 +5795,20 @@ i40e_aq_add_mirror_rule(struct i40e_hw *hw, >=20 > i40e_fill_default_direct_cmd_desc(&desc, > i40e_aqc_opc_add_mirror_rule); > + memset(&cmd, 0, sizeof(cmd)); >=20 > buff_len =3D sizeof(uint16_t) * count; > desc.datalen =3D rte_cpu_to_le_16(buff_len); > if (buff_len > 0) > desc.flags |=3D rte_cpu_to_le_16( > (uint16_t)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD)); > - cmd->rule_type =3D rte_cpu_to_le_16(rule_type << > + cmd.rule_type =3D rte_cpu_to_le_16(rule_type << > I40E_AQC_MIRROR_RULE_TYPE_SHIFT); > - cmd->num_entries =3D rte_cpu_to_le_16(count); > - cmd->seid =3D rte_cpu_to_le_16(seid); > - cmd->destination =3D rte_cpu_to_le_16(dst_id); > + cmd.num_entries =3D rte_cpu_to_le_16(count); > + cmd.seid =3D rte_cpu_to_le_16(seid); > + cmd.destination =3D rte_cpu_to_le_16(dst_id); >=20 > + rte_memcpy(&desc.params.raw, &cmd, sizeof(cmd)); > status =3D i40e_asq_send_command(hw, &desc, entries, buff_len, NULL); > PMD_DRV_LOG(INFO, "i40e_aq_add_mirror_rule, aq_status %d," > "rule_id =3D %u" > @@ -5836,30 +5837,30 @@ i40e_aq_del_mirror_rule(struct i40e_hw *hw, > uint16_t count, uint16_t rule_id) > { > struct i40e_aq_desc desc; > - struct i40e_aqc_add_delete_mirror_rule *cmd =3D > - (struct i40e_aqc_add_delete_mirror_rule *)&desc.params.raw; > + struct i40e_aqc_add_delete_mirror_rule cmd; > uint16_t buff_len =3D 0; > enum i40e_status_code status; > void *buff =3D NULL; >=20 > i40e_fill_default_direct_cmd_desc(&desc, > i40e_aqc_opc_delete_mirror_rule); > - > + memset(&cmd, 0, sizeof(cmd)); > if (rule_type =3D=3D I40E_AQC_MIRROR_RULE_TYPE_VLAN) { > desc.flags |=3D rte_cpu_to_le_16((uint16_t)(I40E_AQ_FLAG_BUF > | > I40E_AQ_FLAG_RD)); > - cmd->num_entries =3D count; > + cmd.num_entries =3D count; > buff_len =3D sizeof(uint16_t) * count; > desc.datalen =3D rte_cpu_to_le_16(buff_len); > buff =3D (void *)entries; > } else > /* rule id is filled in destination field for deleting mirror rule */ > - cmd->destination =3D rte_cpu_to_le_16(rule_id); > + cmd.destination =3D rte_cpu_to_le_16(rule_id); >=20 > - cmd->rule_type =3D rte_cpu_to_le_16(rule_type << > + cmd.rule_type =3D rte_cpu_to_le_16(rule_type << > I40E_AQC_MIRROR_RULE_TYPE_SHIFT); > - cmd->seid =3D rte_cpu_to_le_16(seid); > + cmd.seid =3D rte_cpu_to_le_16(seid); >=20 > + rte_memcpy(&desc.params.raw, &cmd, sizeof(cmd)); > status =3D i40e_asq_send_command(hw, &desc, buff, buff_len, NULL); >=20 > return status; > -- > 1.9.3