From: "谢华伟(此时此刻)" <huawei.xhw@alibaba-inc.com> To: Maxime Coquelin <maxime.coquelin@redhat.com>, ferruh.yigit@intel.com Cc: dev@dpdk.org, anatoly.burakov@intel.com, david.marchand@redhat.com, zhihong.wang@intel.com, chenbo.xia@intel.com, grive@u256.net Subject: Re: [dpdk-dev] [PATCH v5 0/3] support both PIO and MMIO BAR for virtio PMD Date: Fri, 15 Jan 2021 02:19:47 +0800 Message-ID: <6b05b2b3-7616-f121-d827-67a2b25c641b@alibaba-inc.com> (raw) In-Reply-To: <d9092fdf-6149-4338-f861-ba728773ce05@redhat.com> On 2021/1/13 1:37, Maxime Coquelin wrote: > > On 10/22/20 5:51 PM, 谢华伟(此时此刻) wrote: >> From: "huawei.xhw" <huawei.xhw@alibaba-inc.com> >> >> Legacy virtio-pci only supports PIO BAR resource. As we need to create lots of >> virtio devices and PIO resource on x86 is very limited, we expose MMIO BAR. >> >> Kernel supports both PIO and MMIO BAR for legacy virtio-pci device. We handles >> different type of BAR in the similar way. >> >> In previous implementation, with igb_uio we get PIO address from igb_uio >> sysfs entry; with uio_pci_generic, we get PIO address from >> /proc/ioports. >> For PIO/MMIO RW, there is different path for different drivers and arch. >> For VFIO, PIO/MMIO RW is through syscall, which has big performance >> issue. > Regarding the performance issue, do you have some numbers to share? > AFAICS, it can only have an impact on performance when interrupt mode is > used or queue notification is enabled. I didn't have performance number, but would do it when have time. Yes, it is not needed when virtio backend/device is working in polling mode. But anyway, ioctl isn't needed at all. /huawei > > Does your HW Virtio implementation requires notification? > > Is performance the only issue to have your HW working with Virtio PMD, > or is this series also fixing some functionnal issues? There is two purpose with this patch. One is to support MMIO, and the other is to unify/simplify the way to get IO/MMIO resource and read/write IO/MMIO port for virtio PMD. Current implementation is too complicated. /huawei > > Best regards, > Maxime >> On X86, it assumes only PIO is supported. >> >> All of the above is too much twisted. >> This patch unifies the way to get both PIO and MMIO address for different driver >> and arch, all from standard resource attr under pci sysfs. >> >> We distinguish PIO and MMIO by their address like how kernel does. It is ugly but works. >> >> v2 changes: >> - add more explanation in the commit message >> >> v3 changes: >> - fix patch format issues >> >> v4 changes: >> - fixes for RTE_KDRV_UIO_GENERIC -> RTE_PCI_KDRV_UIO_GENERIC >> >> v5 changes: >> - split into three seperate patches >> >> huawei.xhw (3): >> PCI: use PCI standard sysfs entry to get PIO address >> PCI: support MMIO in rte_pci_ioport_map/unap/read/write >> PCI: don't use vfio ioctl call to access PIO resource >> >> drivers/bus/pci/linux/pci.c | 89 +------------------- >> drivers/bus/pci/linux/pci_uio.c | 177 ++++++++++++++++++++++++++++------------ >> 2 files changed, 128 insertions(+), 138 deletions(-) >>
next prev parent reply other threads:[~2021-01-14 18:20 UTC|newest] Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-09-30 14:59 [dpdk-dev] [PATCH v2] pci: support both PIO and MMIO BAR for legacy virtio on x86 谢华伟(此时此刻) 2020-10-01 10:22 ` Burakov, Anatoly 2020-10-02 5:44 ` 谢华伟(此时此刻) 2020-10-09 8:36 ` [dpdk-dev] [PATCH v3] " 谢华伟(此时此刻) 2020-10-13 8:41 ` [dpdk-dev] [PATCH v4] support both PIO and MMIO bar for virtio pci device 谢华伟(此时此刻) 2020-10-13 8:41 ` [dpdk-dev] [PATCH v4] pci: support both PIO and MMIO BAR for legacy virtio on x86 谢华伟(此时此刻) 2020-10-13 12:34 ` 谢华伟(此时此刻) 2020-10-21 8:46 ` 谢华伟(此时此刻) 2020-10-21 11:49 ` Ferruh Yigit 2020-10-21 12:32 ` 谢华伟(此时此刻) 2020-10-21 17:24 ` Ferruh Yigit 2020-10-22 9:15 ` 谢华伟(此时此刻) 2020-10-22 9:44 ` Ferruh Yigit 2020-10-22 9:57 ` 谢华伟(此时此刻) 2020-10-22 15:51 ` [dpdk-dev] [PATCH v5 0/3] support both PIO and MMIO BAR for virtio PMD 谢华伟(此时此刻) 2020-10-22 15:51 ` [dpdk-dev] [PATCH v5 1/3] PCI: use PCI standard sysfs entry to get PIO address 谢华伟(此时此刻) 2021-01-12 8:07 ` Maxime Coquelin 2021-01-14 18:23 ` 谢华伟(此时此刻) 2021-01-24 15:10 ` Xueming(Steven) Li 2020-10-22 15:51 ` [dpdk-dev] [PATCH v5 2/3] PCI: support MMIO in rte_pci_ioport_map/unap/read/write 谢华伟(此时此刻) 2021-01-12 8:23 ` Maxime Coquelin 2021-01-21 6:30 ` 谢华伟(此时此刻) 2021-01-24 15:22 ` Xueming(Steven) Li 2021-01-25 3:08 ` 谢华伟(此时此刻) 2021-01-27 10:40 ` Ferruh Yigit 2021-01-27 15:34 ` 谢华伟(此时此刻) 2021-01-27 16:45 ` Ferruh Yigit 2020-10-22 15:51 ` [dpdk-dev] [PATCH v5 3/3] PCI: don't use vfio ioctl call to access PIO resource 谢华伟(此时此刻) 2021-01-12 9:37 ` Maxime Coquelin 2021-01-12 16:58 ` Maxime Coquelin 2021-01-20 14:54 ` 谢华伟(此时此刻) 2021-01-21 8:29 ` Maxime Coquelin 2021-01-21 14:57 ` 谢华伟(此时此刻) 2021-01-21 15:00 ` 谢华伟(此时此刻) 2021-01-21 15:38 ` Maxime Coquelin 2021-01-22 7:25 ` 谢华伟(此时此刻) 2021-01-26 10:44 ` Maxime Coquelin 2021-01-27 10:32 ` Ferruh Yigit 2021-01-27 12:17 ` Maxime Coquelin 2021-01-27 14:43 ` 谢华伟(此时此刻) 2021-01-27 16:45 ` Ferruh Yigit 2021-01-28 13:43 ` 谢华伟(此时此刻) 2021-01-26 12:30 ` 谢华伟(此时此刻) 2021-01-26 12:35 ` Maxime Coquelin 2021-01-26 14:24 ` 谢华伟(此时此刻) 2020-10-27 8:50 ` [dpdk-dev] [PATCH v5 0/3] support both PIO and MMIO BAR for virtio PMD 谢华伟(此时此刻) 2020-10-28 3:48 ` 谢华伟(此时此刻) 2020-11-02 11:56 ` 谢华伟(此时此刻) 2020-11-10 12:35 ` 谢华伟(此时此刻) 2020-11-10 12:42 ` David Marchand 2020-11-12 13:35 ` 谢华伟(此时此刻) 2020-12-14 14:24 ` 谢华伟(此时此刻) 2020-12-16 7:54 ` Maxime Coquelin 2021-01-12 17:37 ` Maxime Coquelin 2021-01-14 18:19 ` 谢华伟(此时此刻) [this message] 2021-01-21 4:12 ` 谢华伟(此时此刻) 2021-01-21 8:47 ` Maxime Coquelin 2021-01-21 13:51 ` 谢华伟(此时此刻)
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