From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id B58AAA3160 for ; Wed, 9 Oct 2019 13:17:18 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 165421C1E4; Wed, 9 Oct 2019 13:17:18 +0200 (CEST) Received: from rcdn-iport-9.cisco.com (rcdn-iport-9.cisco.com [173.37.86.80]) by dpdk.org (Postfix) with ESMTP id 67A771C0C0 for ; Wed, 9 Oct 2019 13:17:16 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=cisco.com; i=@cisco.com; l=1579; q=dns/txt; s=iport; t=1570619836; x=1571829436; h=from:to:cc:subject:date:message-id:references: in-reply-to:content-transfer-encoding:mime-version; bh=wrFZvttoCt2Oe9YuSbFqqpZYARdgGqrP1Ggu8aBVoco=; b=Af+5IFpCS7RjHCGjhFI6fMPqtZlFZ4Vu9W9y/EflV6t4EX/7dgb5lcw6 /klzYtYKnJIULCFvjqJ7I8ohcH2AGSBjl6NEyKHvPlQUK2SISpm9VB2M2 4WtBvtLzU1PEK5z3i66hjc7Kn9vIV186D69TpKXW3063OvVPujS14gjOo o=; X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: =?us-ascii?q?A0APAAD4wJ1d/4YNJK1mGgEBAQEBAQE?= =?us-ascii?q?BAQMBAQEBEQEBAQICAQEBAYFpAwEBAQELAYIdgXIqCpJzgg+ZK4F7CQEBAQw?= =?us-ascii?q?BAS8BAYRAAoJOIzYHDgIDCQEBBAEBAQIBBQRthS0MhUsBAQEBAzoyCgMMBAI?= =?us-ascii?q?BCBEEAQEfEDIdCAIEAQ0FCIUlr1SCJ4pGgTQBjA0YgX+EIz6ELh2FXwSPNI8?= =?us-ascii?q?cjnMKHYIFlREjgjqXBo4tgT+XdwIRFYEyJwQugVhwFYMnUBAUiASIEUMxj3G?= =?us-ascii?q?BIwEB?= X-IronPort-AV: E=Sophos;i="5.67,273,1566864000"; d="scan'208";a="556225189" Received: from alln-core-12.cisco.com ([173.36.13.134]) by rcdn-iport-9.cisco.com with ESMTP/TLS/DHE-RSA-SEED-SHA; 09 Oct 2019 11:17:15 +0000 Received: from XCH-ALN-002.cisco.com (xch-aln-002.cisco.com [173.36.7.12]) by alln-core-12.cisco.com (8.15.2/8.15.2) with ESMTPS id x99BHEmG005940 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=FAIL); Wed, 9 Oct 2019 11:17:15 GMT Received: from xch-aln-004.cisco.com (173.36.7.14) by XCH-ALN-002.cisco.com (173.36.7.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 9 Oct 2019 06:17:14 -0500 Received: from xch-aln-004.cisco.com ([173.36.7.14]) by XCH-ALN-004.cisco.com ([173.36.7.14]) with mapi id 15.00.1473.003; Wed, 9 Oct 2019 06:17:14 -0500 From: "Jakub Grajciar -X (jgrajcia - PANTHEON TECHNOLOGIES at Cisco)" To: "Phil Yang (Arm Technology China)" , "dev@dpdk.org" CC: "thomas@monjalon.net" , "jerinj@marvell.com" , Honnappa Nagarahalli , "Damjan Marion (damarion)" , nd , "Gavin Hu (Arm Technology China)" , "ferruh.yigit@intel.com" , nd Thread-Topic: [dpdk-dev] [PATCH v1] net/memif: optimized with one-way barrier Thread-Index: AQHVW/3zzaAsyGi130SZ5JUheRsAdadQ2DvggAFRJICAAEQb0A== Date: Wed, 9 Oct 2019 11:17:14 +0000 Message-ID: <6d11f6f6cb1440878a1f2d527576cca6@XCH-ALN-004.cisco.com> References: <1566817214-26599-1-git-send-email-phil.yang@arm.com> <643c7eb281aa4b1e832f9d7f34af741f@XCH-ALN-004.cisco.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.61.230.61] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-Outbound-SMTP-Client: 173.36.7.12, xch-aln-002.cisco.com X-Outbound-Node: alln-core-12.cisco.com Subject: Re: [dpdk-dev] [PATCH v1] net/memif: optimized with one-way barrier X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > > > > -----Original Message----- > > > > From: dev On Behalf Of Phil Yang > > > > Sent: Monday, August 26, 2019 7:00 PM > > > > To: jgrajcia@cisco.com; dev@dpdk.org > > > > Cc: thomas@monjalon.net; jerinj@marvell.com; Honnappa Nagarahalli > > > > ; damarion@cisco.com; nd > > > > > > > Subject: [dpdk-dev] [PATCH v1] net/memif: optimized with one-way > > > > barrier > > > > > > > > Using 'rte_mb' to synchronize the shared ring head/tail between > > > > producer and consumer will stall the pipeline and damage > > > > performance on the weak memory model platforms, such like aarch64. > > > > Meanwhile update the shared ring head and tail are observable and > > > > ordered > > between > > > CPUs on IA. > > > > > > > > Optimized this full barrier with the one-way barrier can improve > > > > the throughput. On aarch64 n1sdp server this patch make testpmd > > throughput > > > > boost 2.1%. On Intel E5-2640, testpmd got 3.98% performance gain. > > > > > > > > Signed-off-by: Phil Yang > > > > Reviewed-by: Gavin Hu > > > > The patch is looking good, but 'MEMIF_VERSION_MAJOR' in memif.h needs > > to be set to 3 as ring pointers are no longer volatile. >=20 > Updated in v2. > Thanks for your comments. >=20 > Thanks, > Phil I jumped the gun with the version bump. The change doesn't break compatibil= ity. I'm putting reviewed label on v1. Sorry for the inconvenience. Reviewed-by: Jakub Grajciar