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From: "Burakov, Anatoly" <anatoly.burakov@intel.com>
To: Drocula <quzeyao@gmail.com>, maxime.coquelin@redhat.com
Cc: dev@dpdk.org
Subject: Re: [dpdk-dev] [PATCH] bus/pci: check if 5-level paging is enabled when testing IOMMU address width
Date: Thu, 9 Aug 2018 11:49:45 +0100	[thread overview]
Message-ID: <6dae8866-3df9-fa11-ab08-cb553a80102a@intel.com> (raw)
In-Reply-To: <1533494497-16253-1-git-send-email-quzeyao@gmail.com>

On 05-Aug-18 7:41 PM, Drocula wrote:
> The kernel version 4.14 released with the support of 5-level paging.
> When PML5 enabled, user-space virtual addresses uses up to 56 bits.
> see kernel's Documentation/x86/x86_64/mm.txt.
> 
> Signed-off-by: Drocula <quzeyao@gmail.com>
> ---
>   drivers/bus/pci/linux/pci.c | 27 +++++++++++++++++++++++++--
>   1 file changed, 25 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/bus/pci/linux/pci.c b/drivers/bus/pci/linux/pci.c
> index 004600f..8913d6d 100644
> --- a/drivers/bus/pci/linux/pci.c
> +++ b/drivers/bus/pci/linux/pci.c
> @@ -4,6 +4,7 @@
>   
>   #include <string.h>
>   #include <dirent.h>
> +#include <sys/mman.h>
>   
>   #include <rte_log.h>
>   #include <rte_bus.h>
> @@ -553,12 +554,34 @@
>   }
>   
>   #if defined(RTE_ARCH_X86)
> +/*
> + * Try to detect whether the system uses 5-level page table.
> + */
> +static bool
> +system_uses_PML5(void)
> +{
> +	void *page_4k, *mask = (void *)0xf0000000000000;
> +	page_4k = mmap(mask, 4096, PROT_READ | PROT_WRITE,
> +		MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
> +
> +	if (page_4k == (void *) -1)
> +		return false;

Shouldn't this be MAP_FAILED?

> +	munmap(page_4k, 4096);
> +
> +	if ((unsigned long)page_4k & (unsigned long)mask)
> +		return true;
> +	return false;
> +}
> +
>   static bool
>   pci_one_device_iommu_support_va(struct rte_pci_device *dev)
>   {
>   #define VTD_CAP_MGAW_SHIFT	16
>   #define VTD_CAP_MGAW_MASK	(0x3fULL << VTD_CAP_MGAW_SHIFT)
> -#define X86_VA_WIDTH 47 /* From Documentation/x86/x86_64/mm.txt */
> +/*  From Documentation/x86/x86_64/mm.txt */
> +#define X86_VA_WIDTH_PML4 47
> +#define X86_VA_WIDTH_PML5 56
> +
>   	struct rte_pci_addr *addr = &dev->addr;
>   	char filename[PATH_MAX];
>   	FILE *fp;
> @@ -589,7 +612,7 @@
>   	fclose(fp);
>   
>   	mgaw = ((vtd_cap_reg & VTD_CAP_MGAW_MASK) >> VTD_CAP_MGAW_SHIFT) + 1;
> -	if (mgaw < X86_VA_WIDTH)
> +	if (mgaw < (system_uses_PML5() ? X86_VA_WIDTH_PML5 : X86_VA_WIDTH_PML4))

This is perhaps nitpicking and a question of personal preferences, but i 
think storing this in a var would be more readable than doing ternary 
operator inside of an if statement.

>   		return false;
>   
>   	return true;
> 


-- 
Thanks,
Anatoly

  reply	other threads:[~2018-08-09 10:49 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-05 18:41 Drocula
2018-08-09 10:49 ` Burakov, Anatoly [this message]
2018-08-10  7:51   ` Drocula
2018-08-09 17:03 ` Stephen Hemminger
2018-08-10  8:35   ` Drocula
2018-08-10  9:18     ` Burakov, Anatoly
2018-08-13 12:57 ` [dpdk-dev] [PATCH v2] " Drocula
2018-10-28 18:22   ` Thomas Monjalon
2023-06-09 16:31 ` [PATCH] " Stephen Hemminger

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