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From: Thomas Monjalon <thomas@monjalon.net>
To: Shreesh Adiga <16567adigashreesh@gmail.com>
Cc: Bruce Richardson <bruce.richardson@intel.com>,
	Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>,
	Jasvinder Singh <jasvinder.singh@intel.com>,
	dev@dpdk.org
Subject: Re: [PATCH] net/crc: reduce usage of static arrays in net_crc_sse.c
Date: Wed, 01 Oct 2025 09:55:21 +0200	[thread overview]
Message-ID: <7068093.UjTJXf6HLC@thomas> (raw)
In-Reply-To: <CA+-x59aDXS9-G=Yx3bUHj=XQX2Tjavkihu0w5r69P62y-g8Lpw@mail.gmail.com>

29/09/2025 18:28, Shreesh Adiga:
> On Wed, Sep 24, 2025 at 8:28 PM Thomas Monjalon <thomas@monjalon.net> wrote:
> 
> > Hello,
> >
> > 16/07/2025 12:34, Shreesh Adiga:
> > > Replace the clearing of lower 32 bits of XMM register with blend of
> > > zero register.
> > > Replace the clearing of upper 64 bits of XMM register with
> > _mm_move_epi64.
> > > Clang is able to optimize away the AND + memory operand with the
> > > above sequence, however GCC is still emitting the code for AND with
> > > memory operands which is being explicitly eliminated here.
> > >
> > > Additionally replace the 48 byte crc_xmm_shift_tab with the contents of
> > > shf_table which is 32 bytes, achieving the same functionality.
> > >
> > > Signed-off-by: Shreesh Adiga <16567adigashreesh@gmail.com>
> >
> > Sorry I'm not following.
> > Please could you start with defining the goal of this patch?
> > Is it a code simplification or a performance optimization?
> 
> It is intended to be a minor performance optimization.

Please could you give some performance numbers in the commit log?




  reply	other threads:[~2025-10-01  7:55 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-16 10:34 Shreesh Adiga
2025-09-24 14:58 ` Thomas Monjalon
2025-09-29 16:28   ` Shreesh Adiga
2025-10-01  7:55     ` Thomas Monjalon [this message]
2025-10-01 10:24       ` Shreesh Adiga
2025-10-01 12:16         ` Thomas Monjalon

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