From: "Zhang, Qi Z" <qi.z.zhang@intel.com>
To: "Zhang, Yuying" <yuying.zhang@intel.com>, "dev@dpdk.org" <dev@dpdk.org>
Subject: Re: [dpdk-dev] [PATCH v1] net/ice: refine flow priority support in PF
Date: Mon, 6 Sep 2021 00:21:02 +0000 [thread overview]
Message-ID: <71152753d48c45ec85be15728b27f3ae@intel.com> (raw)
In-Reply-To: <20210830052939.2942078-1-yuying.zhang@intel.com>
> -----Original Message-----
> From: Zhang, Yuying <yuying.zhang@intel.com>
> Sent: Monday, August 30, 2021 1:30 PM
> To: dev@dpdk.org; Zhang, Qi Z <qi.z.zhang@intel.com>
> Cc: Zhang, Yuying <yuying.zhang@intel.com>
> Subject: [PATCH v1] net/ice: refine flow priority support in PF
>
> The usage of priority is converse in pipeline mode and non-pipeline mode.
> Refine attribute priority support of flow filter in PF driver. When priority is 0,
> rules are created in switch filter first and FDIR is used as backup. When priority
> is 1, rules are all created in switch filter. Other filters don't support priority 1.
> Value 0 denotes higher priority.
>
> Signed-off-by: Yuying Zhang <yuying.zhang@intel.com>
> ---
> drivers/net/ice/ice_acl_filter.c | 5 ++++-
> drivers/net/ice/ice_fdir_filter.c | 5 ++++-
> drivers/net/ice/ice_generic_flow.c | 4 ++--
> drivers/net/ice/ice_hash.c | 5 ++++-
> drivers/net/ice/ice_switch_filter.c | 2 +-
> 5 files changed, 15 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/net/ice/ice_acl_filter.c b/drivers/net/ice/ice_acl_filter.c
> index 0c15a7036c..614bd44e23 100644
> --- a/drivers/net/ice/ice_acl_filter.c
> +++ b/drivers/net/ice/ice_acl_filter.c
> @@ -904,7 +904,7 @@ ice_acl_parse(struct ice_adapter *ad,
> uint32_t array_len,
> const struct rte_flow_item pattern[],
> const struct rte_flow_action actions[],
> - uint32_t priority __rte_unused,
> + uint32_t priority,
> void **meta,
> struct rte_flow_error *error)
> {
> @@ -914,6 +914,9 @@ ice_acl_parse(struct ice_adapter *ad,
> uint64_t input_set;
> int ret;
>
> + if (priority >= 1)
> + return -rte_errno;
> +
> memset(filter, 0, sizeof(*filter));
> item = ice_search_pattern_match_item(ad, pattern, array, array_len,
> error);
> diff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir_filter.c
> index 7ba65b9b04..c9f833c5c9 100644
> --- a/drivers/net/ice/ice_fdir_filter.c
> +++ b/drivers/net/ice/ice_fdir_filter.c
> @@ -2194,7 +2194,7 @@ ice_fdir_parse(struct ice_adapter *ad,
> uint32_t array_len,
> const struct rte_flow_item pattern[],
> const struct rte_flow_action actions[],
> - uint32_t priority __rte_unused,
> + uint32_t priority,
> void **meta,
> struct rte_flow_error *error)
> {
> @@ -2204,6 +2204,9 @@ ice_fdir_parse(struct ice_adapter *ad,
> uint64_t input_set;
> int ret;
>
> + if (priority >= 1)
> + return -rte_errno;
> +
> memset(filter, 0, sizeof(*filter));
> item = ice_search_pattern_match_item(ad, pattern, array, array_len,
> error);
> diff --git a/drivers/net/ice/ice_generic_flow.c
> b/drivers/net/ice/ice_generic_flow.c
> index c2fa75f165..1d557a05f4 100644
> --- a/drivers/net/ice/ice_generic_flow.c
> +++ b/drivers/net/ice/ice_generic_flow.c
> @@ -1923,9 +1923,9 @@ ice_register_parser(struct ice_flow_parser *parser,
> } else {
> if (parser->engine->type == ICE_FLOW_ENGINE_SWITCH ||
> parser->engine->type == ICE_FLOW_ENGINE_HASH)
> - TAILQ_INSERT_TAIL(list, parser_node, node);
> - else if (parser->engine->type == ICE_FLOW_ENGINE_FDIR)
> TAILQ_INSERT_HEAD(list, parser_node, node);
> + else if (parser->engine->type == ICE_FLOW_ENGINE_FDIR)
> + TAILQ_INSERT_TAIL(list, parser_node, node);
> else if (parser->engine->type == ICE_FLOW_ENGINE_ACL)
> TAILQ_INSERT_HEAD(list, parser_node, node);
> else
> diff --git a/drivers/net/ice/ice_hash.c b/drivers/net/ice/ice_hash.c index
> 54d14dfcdd..175780c9ff 100644
> --- a/drivers/net/ice/ice_hash.c
> +++ b/drivers/net/ice/ice_hash.c
> @@ -1034,7 +1034,7 @@ ice_hash_parse_pattern_action(__rte_unused
> struct ice_adapter *ad,
> uint32_t array_len,
> const struct rte_flow_item pattern[],
> const struct rte_flow_action actions[],
> - uint32_t priority __rte_unused,
> + uint32_t priority,
> void **meta,
> struct rte_flow_error *error)
> {
> @@ -1043,6 +1043,9 @@ ice_hash_parse_pattern_action(__rte_unused
> struct ice_adapter *ad,
> struct ice_rss_meta *rss_meta_ptr;
> uint64_t phint = ICE_PHINT_NONE;
>
> + if (priority >= 1)
> + return -rte_errno;
> +
> rss_meta_ptr = rte_zmalloc(NULL, sizeof(*rss_meta_ptr), 0);
> if (!rss_meta_ptr) {
> rte_flow_error_set(error, EINVAL,
> diff --git a/drivers/net/ice/ice_switch_filter.c
> b/drivers/net/ice/ice_switch_filter.c
> index f222cb9cb0..28f9ae39d5 100644
> --- a/drivers/net/ice/ice_switch_filter.c
> +++ b/drivers/net/ice/ice_switch_filter.c
> @@ -1651,7 +1651,7 @@ ice_switch_parse_action(struct ice_pf *pf,
> rule_info->sw_act.vsi_handle = vsi->idx;
> rule_info->rx = 1;
> rule_info->sw_act.src = vsi->idx;
> - rule_info->priority = priority + 5;
> + rule_info->priority = 6 - priority;
I think this is the chance to replace magic number of switch rule priority with macro, and also add some comment here to explain the calculation.
>
> return 0;
>
> --
> 2.25.1
next prev parent reply other threads:[~2021-09-06 0:21 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-30 5:29 Yuying Zhang
2021-09-06 0:21 ` Zhang, Qi Z [this message]
2021-09-06 6:00 ` [dpdk-dev] [PATCH v2] " Yuying Zhang
2021-09-08 4:58 ` [dpdk-dev] [PATCH v3] " Yuying Zhang
2021-09-13 0:42 ` Zhang, Qi Z
2021-09-16 15:58 ` Ferruh Yigit
2021-09-18 6:49 ` [dpdk-dev] [PATCH v4] net/ice: fix flow priority support in non-pipeline mode Yuying Zhang
2021-09-22 7:29 ` Zhang, Qi Z
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