From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id 7496A1D7 for ; Thu, 3 May 2018 10:12:11 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 03 May 2018 01:12:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,357,1520924400"; d="scan'208";a="38329271" Received: from tanjianf-mobl.ccr.corp.intel.com (HELO [10.67.64.68]) ([10.67.64.68]) by orsmga008.jf.intel.com with ESMTP; 03 May 2018 01:12:08 -0700 To: "Xu, Rosen" , dev@dpdk.org References: <1521553556-62982-1-git-send-email-rosen.xu@intel.com> <1524735793-37302-1-git-send-email-rosen.xu@intel.com> <1524735793-37302-2-git-send-email-rosen.xu@intel.com> <807826d0-bf13-41d4-1612-5cbdaaf82098@intel.com> Cc: declan.doherty@intel.com, bruce.richardson@intel.com, shreyansh.jain@nxp.com, ferruh.yigit@intel.com, konstantin.ananyev@intel.com, tianfei.zhang@intel.com, hao.wu@intel.com, gaetan.rivet@6wind.com From: "Tan, Jianfeng" Message-ID: <79ca5cce-0a06-4215-e45c-955b69526990@intel.com> Date: Thu, 3 May 2018 16:12:06 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.3; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <807826d0-bf13-41d4-1612-5cbdaaf82098@intel.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH v6 1/5] iFPGA: Add Intel FPGA BUS Library X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 03 May 2018 08:12:11 -0000 On 5/3/2018 11:58 AM, Tan, Jianfeng wrote: > I have a question, hope you can clarify it a little bit. As I > understand, this FPGA bus are used for AFU device enumeration, and > each device on this bus needs a AFU driver to drive. But now we > register AFU drivers, but enumerate rte_ifpga_device. Why? The reason > I can think of, we need to maintain the relationship of fpga devices > and afu devices. But I think similar problem would exist in dpaa and > fslmc bus too. It is interesting to know the best practice on this. After offline discussion with Tianfei, I got that current implementation is to add a bus for afu devices and afu drivers. As for the bus name, ifpga bus or afu bus, I'm OK to both; only if you clarify the purpose of this bus is to manage afu devices and afu drivers. Thanks, Jianfeng