From: Shijith Thotton <sthotton@marvell.com>
To: <dev@dpdk.org>
Cc: Shijith Thotton <sthotton@marvell.com>, <jerinj@marvell.com>,
"Pavan Nikhilesh" <pbhagavatula@marvell.com>
Subject: [dpdk-dev] [PATCH] event/cnxk: fix SSO and TIM argument parsing
Date: Fri, 6 Aug 2021 21:32:34 +0530 [thread overview]
Message-ID: <7b6c2f7a5e4b130204c7fdca92daf921631e479d.1628253156.git.sthotton@marvell.com> (raw)
Type of kvargs value and handler function argument should match to avoid
spilling memory.
Fixes: 7ffa7379965e ("event/cnxk: add option to configure getwork mode")
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
---
drivers/event/cnxk/cnxk_eventdev.c | 6 +++---
drivers/event/cnxk/cnxk_tim_evdev.h | 4 ++--
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/event/cnxk/cnxk_eventdev.c b/drivers/event/cnxk/cnxk_eventdev.c
index cfd7fb971c..be682bb0df 100644
--- a/drivers/event/cnxk/cnxk_eventdev.c
+++ b/drivers/event/cnxk/cnxk_eventdev.c
@@ -571,11 +571,11 @@ cnxk_sso_parse_devargs(struct cnxk_sso_evdev *dev, struct rte_devargs *devargs)
&dev->xae_cnt);
rte_kvargs_process(kvlist, CNXK_SSO_GGRP_QOS, &parse_sso_kvargs_dict,
dev);
- rte_kvargs_process(kvlist, CNXK_SSO_FORCE_BP, &parse_kvargs_value,
+ rte_kvargs_process(kvlist, CNXK_SSO_FORCE_BP, &parse_kvargs_flag,
&dev->force_ena_bp);
- rte_kvargs_process(kvlist, CN9K_SSO_SINGLE_WS, &parse_kvargs_value,
+ rte_kvargs_process(kvlist, CN9K_SSO_SINGLE_WS, &parse_kvargs_flag,
&single_ws);
- rte_kvargs_process(kvlist, CN10K_SSO_GW_MODE, &parse_kvargs_value,
+ rte_kvargs_process(kvlist, CN10K_SSO_GW_MODE, &parse_kvargs_flag,
&dev->gw_mode);
dev->dual_ws = !single_ws;
rte_kvargs_free(kvlist);
diff --git a/drivers/event/cnxk/cnxk_tim_evdev.h b/drivers/event/cnxk/cnxk_tim_evdev.h
index c369f6f472..8e25cef0c4 100644
--- a/drivers/event/cnxk/cnxk_tim_evdev.h
+++ b/drivers/event/cnxk/cnxk_tim_evdev.h
@@ -90,8 +90,8 @@ struct cnxk_tim_evdev {
uint32_t chunk_sz;
/* Dev args */
uint8_t disable_npa;
- uint16_t chunk_slots;
- uint16_t min_ring_cnt;
+ uint32_t chunk_slots;
+ uint32_t min_ring_cnt;
uint8_t enable_stats;
uint16_t ring_ctl_cnt;
struct cnxk_tim_ctl *ring_ctl_data;
--
2.25.1
next reply other threads:[~2021-08-06 16:02 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-06 16:02 Shijith Thotton [this message]
2021-08-30 16:06 ` [dpdk-dev] [PATCH v2] " Shijith Thotton
2021-09-06 8:51 ` Jerin Jacob
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