From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 167C337B8 for ; Tue, 15 Nov 2016 13:19:12 +0100 (CET) Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga102.fm.intel.com with ESMTP; 15 Nov 2016 04:19:11 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,494,1473145200"; d="scan'208";a="31510095" Received: from fyigit-mobl1.ger.corp.intel.com (HELO [10.237.220.57]) ([10.237.220.57]) by fmsmga006.fm.intel.com with ESMTP; 15 Nov 2016 04:19:10 -0800 To: "Ananyev, Konstantin" , "Richardson, Bruce" References: <20160714172719.17502-1-vladyslav.buslov@harmonicinc.com> <20160714172719.17502-2-vladyslav.buslov@harmonicinc.com> <18156776-3658-a97d-3fbc-19c1a820a04d@intel.com> <9BB6961774997848B5B42BEC655768F80E277DFC@SHSMSX103.ccr.corp.intel.com> <2601191342CEEE43887BDE71AB9772583F0C0408@irsmsx105.ger.corp.intel.com> <2601191342CEEE43887BDE71AB9772583F0C09AD@irsmsx105.ger.corp.intel.com> <20161013101849.GA132256@bricha3-MOBL3> <2601191342CEEE43887BDE71AB9772583F0C1209@irsmsx105.ger.corp.intel.com> Cc: Vladyslav Buslov , "Wu, Jingjing" , "Zhang, Helin" , "dev@dpdk.org" From: Ferruh Yigit Message-ID: <7c26e964-f2c8-1685-829c-e1c37bb25bf3@intel.com> Date: Tue, 15 Nov 2016 12:19:09 +0000 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 MIME-Version: 1.0 In-Reply-To: <2601191342CEEE43887BDE71AB9772583F0C1209@irsmsx105.ger.corp.intel.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 8bit Subject: Re: [dpdk-dev] [PATCH] net/i40e: add additional prefetch instructions for bulk rx X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Nov 2016 12:19:13 -0000 On 10/13/2016 11:30 AM, Ananyev, Konstantin wrote: <...> >>>> >>>> Actually I can see some valid use cases where it is beneficial to have this prefetch in driver. >>>> In our sw distributor case it is trivial to just prefetch next packet on each iteration because packets are processed one by one. >>>> However when we move this functionality to hw by means of RSS/vfunction/FlowDirector(our long term goal) worker threads will >> receive >>>> packets directly from rx queues of NIC. >>>> First operation of worker thread is to perform bulk lookup in hash table by destination MAC. This will cause cache miss on accessing >> each >>>> eth header and can't be easily mitigated in application code. >>>> I assume it is ubiquitous use case for DPDK. >>> >>> Yes it is a quite common use-case. >>> Though I many cases it is possible to reorder user code to hide (or minimize) that data-access latency. >>> From other side there are scenarios where this prefetch is excessive and can cause some drop in performance. >>> Again, as I know, none of PMDs for Intel devices prefetches packet's data in simple (single segment) RX mode. >>> Another thing that some people may argue then - why only one cache line is prefetched, >>> in some use-cases might need to look at 2-nd one. >>> >> There is a build-time config setting for this behaviour for exactly the reasons >> called out here - in some apps you get a benefit, in others you see a perf >> hit. The default is "on", which makes sense for most cases, I think. >> From common_base: >> >> CONFIG_RTE_PMD_PACKET_PREFETCH=y$ > > Yes, but right now i40e and ixgbe non-scattered RX (both vector and scalar) just ignore that flag. > Though yes, might be a good thing to make them to obey that flag properly. Hi Vladyslav, According Konstantin's comment, what do you think updating patch to do prefetch within CONFIG_RTE_PMD_PACKET_PREFETCH ifdef? But since config option is enabled by default, performance concern is still valid and needs to be investigated. Thanks, ferruh