From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1DA70A0C46; Thu, 13 May 2021 04:37:04 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 7DA6F4067E; Thu, 13 May 2021 04:37:03 +0200 (CEST) Received: from szxga08-in.huawei.com (szxga08-in.huawei.com [45.249.212.255]) by mails.dpdk.org (Postfix) with ESMTP id AC3424003F; Thu, 13 May 2021 04:37:00 +0200 (CEST) Received: from dggeme762-chm.china.huawei.com (unknown [172.30.72.57]) by szxga08-in.huawei.com (SkyGuard) with ESMTP id 4FgbKj6Hkyz19PWJ; Thu, 13 May 2021 10:32:41 +0800 (CST) Received: from dggpemm500008.china.huawei.com (7.185.36.136) by dggeme762-chm.china.huawei.com (10.3.19.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Thu, 13 May 2021 10:36:57 +0800 Received: from dggpemm500008.china.huawei.com ([7.185.36.136]) by dggpemm500008.china.huawei.com ([7.185.36.136]) with mapi id 15.01.2176.012; Thu, 13 May 2021 10:36:57 +0800 From: wangyunjian To: Slava Ovsiienko , "dev@dpdk.org" CC: Matan Azrad , Shahaf Shuler , dingxiaoxiong , "stable@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH 1/2] net/mlx4: fix mem leak when a device configured repeatedly Thread-Index: AQHXRzFSpYZpjVcWGUe0j7O81g0ptarfWwKAgAFVxTA= Date: Thu, 13 May 2021 02:36:57 +0000 Message-ID: <8376926c4faa4986a5fae3d7ef728d48@huawei.com> References: <1620825508-29440-1-git-send-email-wangyunjian@huawei.com> In-Reply-To: Accept-Language: zh-CN, en-US Content-Language: zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.174.243.60] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-CFilter-Loop: Reflected Subject: Re: [dpdk-dev] [PATCH 1/2] net/mlx4: fix mem leak when a device configured repeatedly X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Slava Ovsiienko [mailto:viacheslavo@nvidia.com] > Sent: Wednesday, May 12, 2021 10:05 PM > To: wangyunjian ; dev@dpdk.org > Cc: Matan Azrad ; Shahaf Shuler ; > dingxiaoxiong ; stable@dpdk.org > Subject: RE: [dpdk-dev] [PATCH 1/2] net/mlx4: fix mem leak when a device > configured repeatedly >=20 > Hi, Yunjian >=20 > Nice and tiny fix, thank you! > Could you, please, remove the empty line after mlx4/5_proc_priv_uninit(de= v) to > follow the mlx5 coding style? OK, I will fix it in next version. Thanks, Yunjian >=20 > With best regards, > Slava >=20 > > -----Original Message----- > > From: wangyunjian > > Sent: Wednesday, May 12, 2021 16:18 > > To: dev@dpdk.org > > Cc: Matan Azrad ; Shahaf Shuler > > ; Slava Ovsiienko ; > > dingxiaoxiong@huawei.com; Yunjian Wang ; > > stable@dpdk.org > > Subject: [dpdk-dev] [PATCH 1/2] net/mlx4: fix mem leak when a device > > configured repeatedly > > > > From: Yunjian Wang > > > > Currently, configuring a mlx device, it will allocate its own process > > private in > > mlx5_proc_priv_init() and only frees it when closing the device. This > > will lead to a memory leak, when a device is configured repeatedly. > > > > For example: > > for(...) > > do > > rte_eth_dev_configure > > rte_eth_rx_queue_setup > > rte_eth_tx_queue_setup > > rte_eth_dev_start > > rte_eth_dev_stop > > done > > > > Fixes: 97d37d2c1f6b ("net/mlx4: remove device register remap") > > Cc: stable@dpdk.org > > > > Signed-off-by: Yunjian Wang > > --- > > drivers/net/mlx4/mlx4.c | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/drivers/net/mlx4/mlx4.c b/drivers/net/mlx4/mlx4.c index > > 7cd35cd3ca..c72587b7ef 100644 > > --- a/drivers/net/mlx4/mlx4.c > > +++ b/drivers/net/mlx4/mlx4.c > > @@ -201,6 +201,8 @@ mlx4_proc_priv_init(struct rte_eth_dev *dev) > > struct mlx4_proc_priv *ppriv; > > size_t ppriv_size; > > > > + mlx4_proc_priv_uninit(dev); > > + > > /* > > * UAR register table follows the process private structure. BlueFlam= e > > * registers for Tx queues are stored in the table. > > -- > > 2.23.0