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From: Thierry Herbelot <thierry.herbelot@6wind.com>
To: dev@dpdk.org
Cc: Thierry Herbelot <thierry.herbelot@6wind.com>,
 Thomas Monjalon <thomas@monjalon.net>, Jerin Jacob <jerinj@marvell.com>,
 Ruifeng Wang <ruifeng.wang@arm.com>,
 Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>,
 =?UTF-8?q?Juraj=20Linke=C5=A1?= <juraj.linkes@pantheon.tech>
Date: Thu, 17 Jun 2021 10:16:27 +0200
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Subject: [dpdk-dev] [PATCH V3] config/arm: add Qualcomm Centriq 2400 part
 number
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0xc00 is for "SoC 2.0" Qualcomm Centriq servers.
0x800 is for "SoC 1.1".

Cc: Jerin Jacob <jerinj@marvell.com>
Cc: Ruifeng Wang <ruifeng.wang@arm.com>
Cc: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Cc: Juraj Linkeš <juraj.linkes@pantheon.tech>

Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
--
V2: add maintainers as Cc
V3: fix meson syntax for the SoC v1.1 machine description
---
 config/arm/meson.build | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/config/arm/meson.build b/config/arm/meson.build
index e83a56e0d589..b33303d09023 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -179,7 +179,8 @@ implementer_qualcomm = {
         ['RTE_MAX_NUMA_NODES', 1]
     ],
     'part_number_config': {
-        '0xc00': {'machine_args':  ['-march=armv8-a+crc']}
+        '0x800': {'machine_args':  ['-march=armv8-a+crc']},
+        '0xc00': {'machine_args':  ['-march=armv8-a+crc']},
     }
 }
 
@@ -223,8 +224,15 @@ soc_bluefield = {
     'numa': false
 }
 
+soc_centriq2400_v1_1 = {
+    'description': 'Qualcomm Centriq 2400 (SoC v1.1)',
+    'implementer': '0x51',
+    'part_number': '0x800',
+    'numa': false
+}
+
 soc_centriq2400 = {
-    'description': 'Qualcomm Centriq 2400',
+    'description': 'Qualcomm Centriq 2400 (SoC v2.0)',
     'implementer': '0x51',
     'part_number': '0xc00',
     'numa': false
-- 
2.29.2