Re: [PATCH 3/3] net/ionic: add vdev support for embedded applications

["Boyer, Andrew" <Andrew.Boyer@amd.com>]

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On Feb 19, 2024, at 9:02 PM, Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com> wrote:

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On Feb 16, 2024, at 11:07 AM, Andrew Boyer <andrew.boyer@amd.com> wrote:

Add support for running DPDK applications directly on AMD Pensando
embedded HW. The platform exposes the device BARs through UIO. The
UIO code in the common/ionic library walks the sysfs filesystem
to identify the relevant BARs and map them into process memory.

The SoCs are named 'Capri' and 'Elba'.

The vdev device interface code is located in ionic_dev_vdev.c.

Some datapath operations are #ifdef-ed out to save on resources when
running in embedded mode.

Some controlpath operations are skipped by the ionic_is_embedded()
helper function.

Before ringing the doorbell, use an ARM 'dsb st' barrier. The normal
barrier inside rte_write64() is insufficient on these devices due to
a chip errata.

Signed-off-by: Andrew Boyer <andrew.boyer@amd.com>
Signed-off-by: Neel Patel <neel.patel@amd.com>
Signed-off-by: R Mohamed Shah <mohamedshah.r@amd.com>
Signed-off-by: Alfredo Cardigliano <cardigliano@ntop.org>
---
config/arm/arm64_capri_linux_gcc   |  16 +++
config/arm/arm64_elba_linux_gcc    |  16 +++
config/arm/meson.build             |  42 ++++++++
drivers/net/ionic/ionic.h          |   2 +-
drivers/net/ionic/ionic_dev.h      |  17 ++++
drivers/net/ionic/ionic_dev_vdev.c | 156 +++++++++++++++++++++++++++++
drivers/net/ionic/ionic_ethdev.c   |   7 ++
drivers/net/ionic/ionic_lif.c      |  19 ++++
drivers/net/ionic/ionic_rxtx.h     |   4 +
drivers/net/ionic/meson.build      |   1 +
10 files changed, 279 insertions(+), 1 deletion(-)
create mode 100644 config/arm/arm64_capri_linux_gcc
create mode 100644 config/arm/arm64_elba_linux_gcc
create mode 100644 drivers/net/ionic/ionic_dev_vdev.c

diff --git a/config/arm/arm64_capri_linux_gcc b/config/arm/arm64_capri_linux_gcc
new file mode 100644
index 0000000000..1a6313e684
--- /dev/null
+++ b/config/arm/arm64_capri_linux_gcc
@@ -0,0 +1,16 @@
+[binaries]
+c = ['ccache', 'aarch64-linux-gnu-gcc']
+cpp = ['ccache', 'aarch64-linux-gnu-g++']
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+platform = 'capri'
diff --git a/config/arm/arm64_elba_linux_gcc b/config/arm/arm64_elba_linux_gcc
new file mode 100644
index 0000000000..4d891bd5a7
--- /dev/null
+++ b/config/arm/arm64_elba_linux_gcc
@@ -0,0 +1,16 @@
+[binaries]
+c = ['ccache', 'aarch64-linux-gnu-gcc']
+cpp = ['ccache', 'aarch64-linux-gnu-g++']
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+platform = 'elba'
diff --git a/config/arm/meson.build b/config/arm/meson.build
index 36f21d2259..2326021fed 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -165,6 +165,33 @@ implementer_cavium = {
   }
}

+implementer_ionic = {
+    'description': 'AMD Pensando',
+    'flags': [
+        ['RTE_MAX_NUMA_NODES', 1],
+        ['RTE_CACHE_LINE_SIZE', 64],
+        ['RTE_LIBRTE_VHOST_NUMA', false],
+        ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
+        ['RTE_LIBRTE_IONIC_PMD_EMBEDDED', true],
+    ],
+    'part_number_config': {
+        '0xc1': {
+            'compiler_options':  ['-mcpu=cortex-a72'],
+            'flags': [
+                ['RTE_MAX_LCORE', 4],
+                ['RTE_LIBRTE_IONIC_PMD_BARRIER_ERRATA', true],
+            ]
+        },
+        '0xc2': {
+            'compiler_options':  ['-mcpu=cortex-a72'],
+            'flags': [
+                ['RTE_MAX_LCORE', 16],
+                ['RTE_LIBRTE_IONIC_PMD_BARRIER_ERRATA', true],
+            ]
+        }
+    }
+}

Can you place it such that it is ordered alphabetically? (I understand that currently things are not ordered alphabetically, I have plans to fix that)

I switched from 'soc_ionic_capri' and 'soc_ionic_elba' to the shorter 'soc_capri' and 'soc_elba', to better match other vendors, and sorted my entries. Please see V2 and let me know if anything else needs to change.

Thanks!
Andrew


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