From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: <johndale@cisco.com> Received: from rcdn-iport-1.cisco.com (rcdn-iport-1.cisco.com [173.37.86.72]) by dpdk.org (Postfix) with ESMTP id 86E772BCD for <dev@dpdk.org>; Wed, 30 Nov 2016 06:48:47 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=cisco.com; i=@cisco.com; l=3531; q=dns/txt; s=iport; t=1480484927; x=1481694527; h=from:to:cc:subject:date:message-id:references: in-reply-to:content-transfer-encoding:mime-version; bh=xvw2oCvthtuq1vGrqsR8eXKtzMJmvQ/5YjMhYU3/ytY=; b=dQy+dqMcXfR0og47hWSMjgPTSNX588Q8ror+eoXTLgREXKAMA5lnVdBf xsr8rXZflQnnObzDamLllJKu6PZnmK6xX1YwxFSJXeNGrBhyxtoQtYpXj zPyTMt7bqfV0Fg3K9ECw1TYYtrCiuOZZHMsgPXW/5xDcjBImaneLo6ZGx c=; X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: =?us-ascii?q?A0B4AQAQZz5Y/4oNJK1dGgEBAQECAQEBA?= =?us-ascii?q?QgBAQEBgzgBAQEBAR+BWweNPpcjkmiCDoIHgmyDNgKBcD8UAQIBAQEBAQEBYii?= =?us-ascii?q?EaAEBAQQ6PwwEAgEIEQQBAR8JBzIUCQgCBAENBQiIZa8Ci1MBAQEBAQEBAQEBA?= =?us-ascii?q?QEBAQEBAQEBAQEchj6EW4oqBYY2lB8BjGiEHIF7hHeJSY1yhAsBHjeBF4VScgG?= =?us-ascii?q?HQYENAQEB?= X-IronPort-AV: E=Sophos;i="5.31,720,1473120000"; d="scan'208";a="181002230" Received: from alln-core-5.cisco.com ([173.36.13.138]) by rcdn-iport-1.cisco.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 30 Nov 2016 05:48:37 +0000 Received: from XCH-ALN-007.cisco.com (xch-aln-007.cisco.com [173.36.7.17]) by alln-core-5.cisco.com (8.14.5/8.14.5) with ESMTP id uAU5mber027277 (version=TLSv1/SSLv3 cipher=AES256-SHA bits=256 verify=FAIL); Wed, 30 Nov 2016 05:48:37 GMT Received: from xch-rcd-007.cisco.com (173.37.102.17) by XCH-ALN-007.cisco.com (173.36.7.17) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Tue, 29 Nov 2016 23:48:37 -0600 Received: from xch-rcd-007.cisco.com ([173.37.102.17]) by XCH-RCD-007.cisco.com ([173.37.102.17]) with mapi id 15.00.1210.000; Tue, 29 Nov 2016 23:48:37 -0600 From: "John Daley (johndale)" <johndale@cisco.com> To: Thomas Monjalon <thomas.monjalon@6wind.com>, "dev@dpdk.org" <dev@dpdk.org>, Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>, Stephen Hurd <stephen.hurd@broadcom.com>, Jan Medala <jan@semihalf.com>, Jakub Palider <jpa@semihalf.com>, Adrien Mazarguil <adrien.mazarguil@6wind.com>, "Alejandro Lucero" <alejandro.lucero@netronome.com>, Harish Patil <harish.patil@qlogic.com>, Rasesh Mody <rasesh.mody@qlogic.com>, Jerin Jacob <jerin.jacob@caviumnetworks.com>, Yuanhan Liu <yuanhan.liu@linux.intel.com>, Yong Wang <yongwang@vmware.com> CC: Tomasz Kulasek <tomaszx.kulasek@intel.com>, "konstantin.ananyev@intel.com" <konstantin.ananyev@intel.com>, "olivier.matz@6wind.com" <olivier.matz@6wind.com> Thread-Topic: [dpdk-dev] [PATCH v12 0/6] add Tx preparation Thread-Index: AQHSRbBJh7W04lMyAUmIMk2xgAg1u6DupzIAgAJnqhA= Date: Wed, 30 Nov 2016 05:48:36 +0000 Message-ID: <8cd623e5433d44cb89b9599f6a60d5cd@XCH-RCD-007.cisco.com> References: <1477486575-25148-1-git-send-email-tomaszx.kulasek@intel.com> <1479922585-8640-1-git-send-email-tomaszx.kulasek@intel.com> <8317180.L80Qf11uiu@xps13> In-Reply-To: <8317180.L80Qf11uiu@xps13> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.19.145.148] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v12 0/6] add Tx preparation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK <dev.dpdk.org> List-Unsubscribe: <http://dpdk.org/ml/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://dpdk.org/ml/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <http://dpdk.org/ml/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> X-List-Received-Date: Wed, 30 Nov 2016 05:48:48 -0000 Hi, -john > -----Original Message----- > From: Thomas Monjalon [mailto:thomas.monjalon@6wind.com] > Sent: Monday, November 28, 2016 3:03 AM > To: dev@dpdk.org; Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>; > Stephen Hurd <stephen.hurd@broadcom.com>; Jan Medala > <jan@semihalf.com>; Jakub Palider <jpa@semihalf.com>; John Daley > (johndale) <johndale@cisco.com>; Adrien Mazarguil > <adrien.mazarguil@6wind.com>; Alejandro Lucero > <alejandro.lucero@netronome.com>; Harish Patil > <harish.patil@qlogic.com>; Rasesh Mody <rasesh.mody@qlogic.com>; Jerin > Jacob <jerin.jacob@caviumnetworks.com>; Yuanhan Liu > <yuanhan.liu@linux.intel.com>; Yong Wang <yongwang@vmware.com> > Cc: Tomasz Kulasek <tomaszx.kulasek@intel.com>; > konstantin.ananyev@intel.com; olivier.matz@6wind.com > Subject: Re: [dpdk-dev] [PATCH v12 0/6] add Tx preparation >=20 > We need attention of every PMD developers on this thread. >=20 > Reminder of what Konstantin suggested: > " > - if the PMD supports TX offloads AND > - if to be able use any of these offloads the upper layer SW would have t= o: > * modify the contents of the packet OR > * obey HW specific restrictions > then it is a PMD developer responsibility to provide tx_prep() that would > implement expected modifications of the packet contents and restriction > checks. > Otherwise, tx_prep() implementation is not required and can be safely set= to > NULL. > " >=20 > I copy/paste also my previous conclusion: >=20 > Before txprep, there is only one API: the application must prepare the > packets checksum itself (get_psd_sum in testpmd). > With txprep, the application have 2 choices: keep doing the job itself or= call > txprep which calls a PMD-specific function. > The question is: does non-Intel drivers need a checksum preparation for > TSO? > Will it behave well if txprep does nothing in these drivers? >=20 > When looking at the code, most of drivers handle the TSO flags. > But it is hard to know whether they rely on the pseudo checksum or not. >=20 > git grep -l 'PKT_TX_UDP_CKSUM\|PKT_TX_TCP_CKSUM\|PKT_TX_TCP_SEG' > drivers/net/ >=20 > drivers/net/bnxt/bnxt_txr.c > drivers/net/cxgbe/sge.c > drivers/net/e1000/em_rxtx.c > drivers/net/e1000/igb_rxtx.c > drivers/net/ena/ena_ethdev.c > drivers/net/enic/enic_rxtx.c > drivers/net/fm10k/fm10k_rxtx.c > drivers/net/i40e/i40e_rxtx.c > drivers/net/ixgbe/ixgbe_rxtx.c > drivers/net/mlx4/mlx4.c > drivers/net/mlx5/mlx5_rxtx.c > drivers/net/nfp/nfp_net.c > drivers/net/qede/qede_rxtx.c > drivers/net/thunderx/nicvf_rxtx.c > drivers/net/virtio/virtio_rxtx.c > drivers/net/vmxnet3/vmxnet3_rxtx.c >=20 > Please, we need a comment for each driver saying "it is OK, we do not nee= d > any checksum preparation for TSO" > or > "yes we have to implement tx_prepare or TSO will not work in this mode" I like the idea of tx prep since it should make for cleaner apps. For enic, I believe the answer is " it is OK, we do not need any checksum p= reparation". Prior to now, it was necessary to set IP checksum to 0 and put in a TCP/UDP= pseudo header. But there is a hardware overwrite of checksums option which= makes preparation in software unnecessary and it is testing out well so fa= r. I plan to enable it in 17.02. TSO is also being enabled for 17.02 and it= does not look like any prep is required. So I'm going with " txprep NULL p= ointer is OK for enic", but may have to change my mind if something comes u= p in testing. -john