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b=VjH8ygwjDLq55uwQEtbXOeJ/GRZ+3EHGAOzA0J3x6J7bLMIzjAMTkKtAzUhp8BCt8iRuthCw0nYEjDx+uTDYFbVL7ZkmgAhHW8cHRaM6tjPjbrVg5r3Siv6UECSh3BvpWAUX5MbDSIcst3ZlV0kWWo4g9HHM/ih9bqYMe5yXTn0= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=amd.com; Received: from CH2PR12MB4294.namprd12.prod.outlook.com (2603:10b6:610:a9::11) by LV3PR12MB9332.namprd12.prod.outlook.com (2603:10b6:408:20f::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6933.28; Wed, 1 Nov 2023 16:55:42 +0000 Received: from CH2PR12MB4294.namprd12.prod.outlook.com ([fe80::2569:edb2:670f:816f]) by CH2PR12MB4294.namprd12.prod.outlook.com ([fe80::2569:edb2:670f:816f%6]) with mapi id 15.20.6954.019; Wed, 1 Nov 2023 16:55:42 +0000 Message-ID: <8e7f6267-c6bc-48dc-b38f-4dabd73f96ce@amd.com> Date: Wed, 1 Nov 2023 16:55:36 +0000 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] net/txgbe: add proper memory barriers in Rx Content-Language: en-US To: Jiawen Wu , dev@dpdk.org Cc: stable@dpdk.org References: <20231030105144.595502-1-jiawenwu@trustnetic.com> <20231101033241.623190-1-jiawenwu@trustnetic.com> From: Ferruh Yigit Autocrypt: addr=ferruh.yigit@amd.com; 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Fix the same issue as ixgbe. > > Segmentation fault has been observed while running the > txgbe_recv_pkts_lro() function to receive packets on the Loongson 3A5000 > processor. It's caused by the out-of-order execution of CPU. So add a > proper memory barrier to ensure the read ordering be correct. > > We also did the same thing in the txgbe_recv_pkts() function to make the > rxd data be valid even though we did not find segmentation fault in this > function. > > Fixes: 0e484278c85f ("net/txgbe: support Rx") > Cc: stable@dpdk.org > > Signed-off-by: Jiawen Wu > Series applied to dpdk-next-net/main, thanks.