From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id DB3547CB6 for ; Thu, 30 Nov 2017 18:15:16 +0100 (CET) Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Nov 2017 09:15:15 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,341,1508828400"; d="scan'208";a="182480176" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by fmsmga006.fm.intel.com with ESMTP; 30 Nov 2017 09:15:15 -0800 Received: from fmsmsx156.amr.corp.intel.com (10.18.116.74) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 30 Nov 2017 09:15:15 -0800 Received: from fmsmsx108.amr.corp.intel.com ([169.254.9.115]) by fmsmsx156.amr.corp.intel.com ([169.254.13.63]) with mapi id 14.03.0319.002; Thu, 30 Nov 2017 09:15:14 -0800 From: "Eads, Gage" To: Pavan Nikhilesh , "jerin.jacobkollanukkaran@cavium.com" , "Van Haaren, Harry" , "Richardson, Bruce" , "hemant.agrawal@nxp.com" , "nipun.gupta@nxp.com" , "Rao, Nikhil" CC: "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH 3/4] app/eventdev: add perf pipeline test Thread-Index: AQHTaaxmgc0QmWFk3US566a1Qjm8DqMtJyiA Date: Thu, 30 Nov 2017 17:15:14 +0000 Message-ID: <9184057F7FC11744A2107296B6B8EB1E2BB0182B@FMSMSX108.amr.corp.intel.com> References: <20171130072406.15605-1-pbhagavatula@caviumnetworks.com> <20171130072406.15605-3-pbhagavatula@caviumnetworks.com> In-Reply-To: <20171130072406.15605-3-pbhagavatula@caviumnetworks.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMjY2ZTNjNTUtNWJhZC00YTVjLWIxMGQtNDQyOTIyOWYxYzU5IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6IldVdmhtSXVVakR3MTQzbjYyVFR3UUNOU3lwSFhMSWJ4V2V6ZE5Kb1Bna0k9In0= x-ctpclassification: CTP_IC dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [10.1.200.108] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH 3/4] app/eventdev: add perf pipeline test X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 30 Nov 2017 17:15:17 -0000 Hi Pavan, > -----Original Message----- > From: Pavan Nikhilesh [mailto:pbhagavatula@caviumnetworks.com] > Sent: Thursday, November 30, 2017 1:24 AM > To: jerin.jacobkollanukkaran@cavium.com; Eads, Gage > ; Van Haaren, Harry ; > Richardson, Bruce ; hemant.agrawal@nxp.com; > nipun.gupta@nxp.com; Rao, Nikhil > Cc: dev@dpdk.org; Pavan Nikhilesh > Subject: [dpdk-dev] [PATCH 3/4] app/eventdev: add perf pipeline test >=20 > This is a performance test case that aims at testing the following: > 1. Measure the end-to-end performance of an event dev with a ethernet dev= . > 2. Maintain packet ordering from Rx to Tx. >=20 > The perf pipeline test configures the eventdev with Q queues and P ports,= where > Q is nb_ethdev * nb_stages and P is nb_workers. >=20 > The user can choose the number of workers and number of stages through th= e -- > wlcores and the --stlist application command line arguments respectively. > The probed ethernet devices act as producer(s) for this application. >=20 > The ethdevs are configured as event Rx adapters that enables them to inje= cts > events to eventdev based the first stage schedule type list requested by = the user > through --stlist the command line argument. >=20 > Based on the number of stages to process(selected through --stlist), the > application forwards the event to next upstream queue and when it reaches= last > stage in the pipeline if the event type is ATOMIC it is enqueued onto eth= dev Tx > queue else to maintain ordering the event type is set to ATOMIC and enque= ued > onto the last stage queue. > On packet Tx, application increments the number events processed and prin= t > periodically in one second to get the number of events processed in one s= econd. >=20 > Note: The --prod_type_ethdev is mandatory for running the application. >=20 > Example command to run perf pipeline test: > sudo build/app/dpdk-test-eventdev -c 0xf -s 0x8 --vdev=3Devent_sw0 -- \ -= - > test=3Dperf_pipeline --wlcore=3D1 --prod_type_ethdev --stlist=3Dao >=20 > Signed-off-by: Pavan Nikhilesh > +static int > +perf_pipeline_eventdev_setup(struct evt_test *test, struct evt_options > +*opt) { > + int ret; > + int nb_ports; > + int nb_queues; > + int nb_stages =3D opt->nb_stages; > + uint8_t queue; > + uint8_t port; > + uint8_t atq =3D evt_has_all_types_queue(opt->dev_id); > + struct test_perf *t =3D evt_test_priv(test); > + > + nb_ports =3D evt_nr_active_lcores(opt->wlcores); > + nb_queues =3D rte_eth_dev_count() * (nb_stages); > + nb_queues +=3D atq ? 0 : rte_eth_dev_count(); > + > + const struct rte_event_dev_config config =3D { > + .nb_event_queues =3D nb_queues, > + .nb_event_ports =3D nb_ports, > + .nb_events_limit =3D 4096, > + .nb_event_queue_flows =3D opt->nb_flows, > + .nb_event_port_dequeue_depth =3D 128, > + .nb_event_port_enqueue_depth =3D 128, > + }; > + > + ret =3D rte_event_dev_configure(opt->dev_id, &config); > + if (ret) { > + evt_err("failed to configure eventdev %d", opt->dev_id); > + return ret; > + } > + > + struct rte_event_queue_conf q_conf =3D { > + .priority =3D RTE_EVENT_DEV_PRIORITY_NORMAL, > + .nb_atomic_flows =3D opt->nb_flows, > + .nb_atomic_order_sequences =3D opt->nb_flows, > + }; > + /* queue configurations */ > + for (queue =3D 0; queue < nb_queues; queue++) { > + if (atq) { > + q_conf.event_queue_cfg =3D > RTE_EVENT_QUEUE_CFG_ALL_TYPES; > + } else { > + uint8_t slot; > + > + slot =3D queue % (nb_stages + 1); > + q_conf.schedule_type =3D slot =3D=3D nb_stages ? > + RTE_SCHED_TYPE_ATOMIC : > + opt->sched_type_list[slot]; > + } > + > + ret =3D rte_event_queue_setup(opt->dev_id, queue, &q_conf); > + if (ret) { > + evt_err("failed to setup queue=3D%d", queue); > + return ret; > + } > + } > + > + /* port configuration */ > + const struct rte_event_port_conf p_conf =3D { > + .dequeue_depth =3D opt->wkr_deq_dep, > + .enqueue_depth =3D 64, > + .new_event_threshold =3D 4096, > + }; > + For the hard-coded event device (new_event_threshold, port_dequeue_depth, e= nqueue_depth) and port configuration (enqueue_depth, new_event_threshold) v= alues, it would be better to use the values from rte_event_dev_info_get() a= nd rte_event_port_default_conf_get() instead. Thanks, Gage